Tips for building your first softcore that nobody warned me about

My experiance lined up with yours on the tooling, but I learned it from the other end. I spent a month getting my little core to execute add and load instructions in simulation, felt like a genius, then sat down to write actual programs and realised my encoding made everything painful. Two-instruction snippets were fine, anything real turned into a mess of extra loads because I had only eight registers and no easy way to keep a pointer handy.

Now I do the opposite of sketching first. I write maybe fifty lines of fake assembly for the kind of program I acutally want to run, then design the register file and instruction formats around that. It sounds backwards but it caught several gaps before any hardware existed. Also, second hand on the testbench advice. Mine was literally forty lines that pushed random instructions at the core and printed the register file each cycle. Ugly, but it caught a flag bug that whould have taken me days to find on the board.

The assembler part hit home hard. I got my core running blinky in a couple weeks and then spent way longer on the assembler than on the actual CPU. My shortcut was writing a tiny disassembler first instead. Sounds dumb, but once I could dump any instruction back out as readable text, debugging the assembler became trivial because I could see exactly what got encoded wrong. Also kept a spreadsheet of every opcode while I was fiddling with formats, saved me from the mid-project ISA churn you mentioned.

Not sure I buy the disassembler-first trick. Every time I touched my encoding early on, that little disassembler broke and I had to rewrite the printout logic all over again. Ended up being more churn than help. What actually saved me was pinning down the encoding with a table in one file and generating everything else from it, so nothing could drift apart. One question though, did your disassembler survive once you started shuffling fields around, or did you just get lucky and lock the format early?

The part that got me wasn't designing the core, it was the day it worked in sim and then did nothing on the board. Turned out I'd written some logic that inferred a latch instead of a flip flop, and the tools never complained loudly enough for me to notice. Now I read the synthesis log like it's a habit, and anything that says 'inferred latch' gets fixed on the spot. Also, adding a serial output early was the best debug move I made, way better than blinking an LED at me in morse code.