What does it mean: Ultralow leakage per I/0 ?


In every uC datasheet I see a parameter of current leakage per I/0, but I don't clearly understand what does it mean. Let's say I have 44 pins and leakage 40 nA, so the entire leakage of all the existing IOs is 44 x 40n ? - I don't think so. Perhaps because a part of currents are positive and a part - negative reduces the total leakage ?

Thanks, E.L.

Reply to
Loading thread data ...

It should be the guaranteed maximum current under stated conditions of I/O logic level, Vcc, and temperature that flows through the components of the gate I/O circuitry. Typically these will be CMOS gate leakage, reverse leakage currents through protection diodes, etc.

Rich Webb     Norfolk, VA
Reply to
Rich Webb

Why not? The leakage is the current that flows through the input pin, outputs are excluded because they are designed to drive current, lots more than 40 nA. The spec is worse case of voltage and temperature. So if you warm the part up to the max operating temp and highest allowed voltage on a worse case part then, yes, each input can pass the rated current and the total will be N x 40 nA. I've seen specs of

10 uA on inputs, but I think that is a number plucked from air as something they will never have trouble with. Sometimes a spec is designed to make testing easy (or eliminate it) rather than reflecting the physics of the part.


Reply to

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.