Re: Why MIPS for embedded systems

MIPS mean Millions of Instructions Per Second but you must consider processors architertures to understand where the differences really are.

Some processors have a separate program code and data bus and some don't (they feetch the program code over the same wires than the datas). I think a 80C31 features some 1.7MIPS at 20MHz (it needs several clock cycles to execute a single instruction). A Philips LPC2106 running at 60MHz features 60MIPS (one instruction per clock cycle).

The clock frequency is fully meaning less. A LPC2106 would indeed only feature 16MIPS at 16MHz. But some computers and microprocessors are running asynchronously and may perform several instructions for a single clock periode. Some others microprocessors may perform several operations in paralelle....

Some processors work on 8 bits... some work on up to 128 bits... I don't know where by we are today in bus width. Does Microsoft and all Wintel apps finally use the 64bit data bus width? :-)

So MIPS (or what MIPS really are) are architecture dependent and I assume this was introduced to distinguish the processors performances. Run a silly code and you will waste your MIPS...

Then you will also see FLOPS for the number of FLoating Operations Per Seconds (again, bus width must be taken into consideration...).

See also those explanations about BogoMIPS which where introduced by linux:

BogoMIPS are more or less the number of time you can do "nothing" (just running a loop, doing nothing :-) in order to evaluate system speed at boot time (kernel timers calibration).

The faster your box is, the more time you can do "nothing" in a given time frame and the more BogoMIPS you will get out of your box :-)

Several methods to speed down a processor or to make it sleep or deep sleep where also introduced but this is another story :-)

Fully meaningless in a network device.

You must care about real throught put in terms of packets or frames or cells per second whilst loading every port at max speed.

On most boxes you will never get max speed = media speed for all kind of traffic and for all conditions (example given with encryption or for small packets or with filtering, etc, etc).

"Chris Barrera" a écrit dans le message de news: d7jlh7$i41$ snipped-for-privacy@home.itg.ti.com...

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Please don't top-post.

The OP is referring to the MIPS processor architecture, not MIPS as an acronym for a performance measurement. This is the reason for my post

-- to encourage others to make the clear distinction between MIPS and MIPS in the context of the thread.

On the topic of the merits of MIPS vs. PowerPC vs. other architectures, I can't comment. I have used, from the bare-metal up, PowerPC, i960, AMD29000, and ARM9 RISC MPUs/MCUs, but never MIPS. I have developed opinions about, and small preferences for, those architectures that I have used.

Perhaps studying the comparative architecture's would clear things up

-- but that takes time.

-- Dan Henry

As a follow-up to my inability to comment, I can give as one reason that MIPS would be popular, that being it is a synthisizable processor. I understand this to mean that much like the ARM, it could be incorporated into a larger design having much application-specific 'hardware'/IP around it, making a single cost-effective device at the core of a product's functionality.

Other architectures might not be so easily incorporated into SoC applications, but not necessarily due to some aspect of their design (e.g., corporate posturing, market niches, etc.).

All my opinion and speculation, of course.

-- Dan Henry

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Fine. You are all tiring of me by now.

s/synthisizable/synthesizable/

Shame on me. I'm sorry.

-- Dan Henry

Typo correction and (humorous) humility both appreciated ;).

Steve

MIPS can also stand for "Microprocessor without Interlocking Pipeline Stages", which describes the first generation of MIPS architecture processors. Later ones have pipeline interlocking though. See also:

And I think that's what the original poster was referring to, not some bogus way to measure processor speed.

I learned something :-)

the popularity in routers may be due to the fact they are 32 bit width (must be usefull for fast IP forwarding tables lookup).

I noticed also they run compressed codewich some years ago could have save space (and flash costs).

anyway, performances and costs are not only processor speed dependent. I think I was not fully wrong as I introduced some architectures differences.

I would not care about what powers a switch, I would care only about its features, its throughtput (and its cost :-)

I cannot resist ...

MIPS = Misleading Information Provided by Sales.

(With due respect to the MIPS processors).

This is my guess with respect to embedded systems. With mips processors you have better control over cache, address space. seperate i-cache and d-cache is added advantage. Guaranteed execution of one instruction per cycle. With superscalar processors you can get more througput.

The reason for choosing may be you get finer control with mips processors.

Hi,

MIPS are also popular due to simple ISA which makes it very easy to decode and makes for a simple design. I've seen MIPS implementations in DSPs alot, for that very reason. When you want a lot of performance and you can optimize your code its best to have it run on MIPS arch.

-Rex