Re: NOR-based Flash Memory - Design


> > Hi > > In NOR-based flash memory, once a bit has > > been set to 0, only by erasing the entire block > > it can be changed back to 1. I am eager > > to know the reason for that behaviour/design ? > > > Further, i wonder why can't NOR-based flash > > memory offer arbitrary random-access rewrite > > or erase operations ? > > > Any ideas ? > > > Thx in advans, > > Karthik Balaguru > > The FPGA subgroup isn't the best place to ask about Flash > fundamentals. =A0Have you tried researching the issue? =A0

Okay, i have looped in comp.arch.embedded. Yeah, I have been searching regarding this & got other links but did not get a link that clearly conveys this info and hence this query.

After lot of searches, got the below links -

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It seems that Flash memory uses in-circuit wiring to apply the electric field either to the entire chip or to predetermined sections known as blocks. This erases the targeted area of the chip, which can then be rewritten. Flash memory works much faster than traditional EEPROMs because instead of erasing one byte at a time, it erases a block or the entire chip, and then rewrites it.

It comes down to > how the floating gate transistors are arranged. =A0See for instance >
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"Flash > memory basics and its interface to a processor" where you'll see how > the source lines (where word lines and bit lines also exist) are used > in the erase.

This link is good ! I understand that erasure operation is done through Quantum tunneling.

Interesting to know that in NAND-flash, cells are connected in series resembling a NAND gate, and so the name. The series connection prevents the cells from being programmed individually. These cells must be read in series.

So, it finally boils down to the design of flash memory that has dependency on predetermined sections known as BLOCKS or entire chip for its in-circuit wiring that applies electric field either to the entire chip or to predetermined sections known as BLOCKS !!

Thx, Karthik Balaguru

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