Re: Fried AVR I/O ports mystery

Mar 16, 2006 3 Replies

Rate this thread:

Olaf 20 years ago

Hi,

>
> We are designing a pyro-circuit for a rocket which is controlled from a
> ATMega32 processor but we seem to have fried the I/O ports of the ATMega
> *twice* due to some design fault. The problem is, we're not sure where the
> problem lies so I'm posting this here in the hope someone can at least

point

us in the right direction.The schematic is attached to this post as a JPEG
> image.
>
> We put a scope on the gate of the FET and we measured a 5V pulse coming

from

the processor on. Since we hadn't connected PYRO_SA_BOOST_SC to
> PYRO_SA_BOOST_1
> no current would have flowed through the FET. After we made the connection
> the pulse still showed up on the gate of the FET but this time it was only
> 50mV top-top! When we measured the resistance on the I/O port pin we get
> about 1 ohm, indicating a destroyed I/O port.
>
> Since the I/O ports have protection diodes we're not sure what could have
> destroyed the outputs. In my experience these ports are extremely rugged

and

can handle quite some abuse. We're baffled by this failure and are keen on
> some advice on this.
>
> Thanks in advance!
>
> Olaf
>
>
>
>
>
>
>
> --------------------------------------------------------------------------

----
>
>
>
>
>
>
>
> --------------------------------------------------------------------------

----
>
>
>
>
>
>
>
>
> --------------------------------------------------------------------------

----
>
>
>
>
>

Vote

Tim Wescott 20 years ago

This is not a 'binary' newsgroup, so your schematic didn't survive -- usually one posts it to a website; there is a binaries.schematic newsgroup to go with sci.electronics.design.

Power FETs usually require a considerable gate charge, with apparent capacitances above 1nF. To a port on a microprocessor this would look like a dead short at first, and would suck considerable current for a relatively long time. I would put a series resistor from port to gate, with the resistor sized so that the 'short circuit' current was no more than the rated current for the port. This will slow down your gate turn-on a bit, so make sure you're OK with that (if it's a one-time event then it probably _is_ OK). If you're _not_ OK with that then consider a transistor amplifier to pull the gate high -- an inverting PNP would pull the FET gate up smartly enough.

Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/

Vote

No One Really 20 years ago

Hi,

for the schematic please refer to:

formatting link

Olaf

the

JPEG

connection

only

have

*** Free account sponsored by SecureIX.com *** *** Encrypt your Internet usage with a free VPN account from

formatting link

***

Vote

Spehro Pefhany 20 years ago

Maybe you have some kind of serious layout problem. There's only about

2A going through the FET, but if it the path is really, really bad, it could end up biasing some pins negative or something like that.

Give the 1 ohm resistors and Q7 their own path back to the high-current supply, and only tie that to the AVR supply at one point.

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

Vote

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required