One for the A/D Gurus.

I'd go to the AD 922x series - the output enable is for a register that is piped (read samples behind). Been around for a few years, very good parts, used 'em, like 'em.

Andrew

Denis Glees>Hello all

Hi Andrew

Thanks for the response.

The data sheet for the AD9226 is realy very sketchy on this issue as it only specifies a Typical delay figure of 15nS for the Output Enable delay.

If I can assume that my two paralled convertors will present a data Bus conversion value some 15nS +/-3nS after setting the Output Enable pin low, then I probably wont have a timing issue with the device.

Any thoughts?

Denis

I know I am late to the party, but if you need double the sample rate, why not get an ADC that will sample at 100 MHz? This is child's play with today's chips. If you need 7 ENOB, then use a 10 bit ADC. There are lots of good fast parts available and 10 bits at 100 MSPS is nowhere near the top of the range.

Denis Glees>

You are right about the SINAD. A 10 bit converter will not do that, and an 8 bit converter will not even come close.

I don't think the OE is needed if he goes with a faster part. He said he wanted to use two ADCs to double the sample rate. No need for the fast OE if you use one part. But he had better make it a 12 bit part to get 60 dB SINAD, still no problem at 100 MHz but the power level will be going up.

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