One for the A/D Gurus.

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Hello all

One for the A/D Gurus.

Ive been searching for an A/D with the following specifications.

1. +5V,+3V or +/-5V +/-3V supplies.
2. Separate Output drive supply if PSU is +5V.
3. 8 bits or greater
4. Parallel interface.
5. ENOB 7
6. Offset error <= 1LSB(Typical)
7. Gain error <= 1LSB(Typical)
8. Current consumption <100mA
9. Power < 500mW
10. Max sampling rate >50MHz
11. Min sampling rate <3MHz
12. Input span 1V or 2V
13. OE to enable outputs onto bus. Must operate at max clock speed.
14. Input BW >= 200MHz
15. Signal to Noise and Distortion ratio (SINAD) >60dB


I think Ive found one, the AD9226 from analog devices but it has a strange
comment in the data sheet about the OE(output enable) control.
The data sheet says that "its not intended for rapid access to the Bus"
Im not sure what this means but it doesnt sound like its for me.

Essentially my current design has two A/Ds in parallel to double the
conversion rate achievable with one. Following some work wih a device
which had higher than desired Gain error and offset error I have come up with
the requirements above.

Many thanks in advance for any help.

Denis

Re: One for the A/D Gurus.
I'd go to the AD 922x series - the output enable is for a register that
is piped (read samples behind).  Been around for a few years, very good
parts, used 'em, like 'em.

Andrew

Denis Gleeson wrote:

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Re: One for the A/D Gurus.
Hi Andrew

Thanks for the response.

The data sheet for the AD9226 is realy very sketchy on this issue
as it only specifies a Typical delay figure of 15nS for the Output
Enable delay.

If I can assume that my two paralled convertors will present a data
Bus conversion value some 15nS +/-3nS after setting the Output
Enable pin low, then I probably wont have a timing issue with the device.

Any thoughts?


Denis


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Re: One for the A/D Gurus.
I know I am late to the party, but if you need double the sample rate,
why not get an ADC that will sample at 100 MHz?  This is child's play
with today's chips.  If you need 7 ENOB, then use a 10 bit ADC.  There
are lots of good fast parts available and 10 bits at 100 MSPS is nowhere
near the top of the range.


Denis Gleeson wrote:
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Rick "rickman" Collins

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Re: One for the A/D Gurus.
ENOB of 7 at 50MHz is no problem, but a SINAD of 60dB with 200MHz input
BW is- a 10-bit will not cut it on single samples. Also seems to be a
problem with an output OE and instantaneous access- this will be
troublesome with pipelined architectures. "Gain error" in terms of LSB?-
a new one.

rickman wrote:
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Re: One for the A/D Gurus.
You are right about the SINAD.  A 10 bit converter will not do that, and
an 8 bit converter will not even come close.  

I don't think the OE is needed if he goes with a faster part.  He said
he wanted to use two ADCs to double the sample rate.  No need for the
fast OE if you use one part.  But he had better make it a 12 bit part to
get 60 dB SINAD, still no problem at 100 MHz but the power level will be
going up.  


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Rick "rickman" Collins

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