Network choices?

I need to output 3 signals and input 2, (all 1 MHz) over a 5m cable in a relatively noisy environment. All channels are independent.

Currently, I'm using rs-422 and a total of 10 wires.

How can I bring the wire number to a minimum?

I don't have any experience with serdes chips, but the things I don't like are: (example, TI SN65LV1021)

- even the smallest chip is too big (has 28 pins),

- uses LVDS which I don't think works best in noisy environments,

- requires SYNC1-2 operation (I think).

Reply to
aleksazr
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  • Orthogonal frequency-division multiplexing.
  • Wireless.

Excuse me? From Wikipedia: "the tightly coupled transmission wires will reduce susceptibility to electromagnetic noise interference because the noise will equally affect each wire and appear as a common-mode noise"

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Reply to
Boudewijn Dijkstra

Over a 5m cable?

Reply to
aleksazr

2 or 3 plastic fibres ( TOSLink or some such ) and serialised data/clock?

LVDS itself should work ok in a noisy environment, but be careful of the common-mode maximum voltages that the transceivers can withstand. It does sound a bit of overkill for what you are trying to do.

Reply to
Yellow

I was hoping to hear something like:

there is a transceiver chip, X inputs, X outputs,

2 diff. pins (rs-422), 1 pin for OSC, VCC and GND.

Two of these chips communicate w/o any intervention, passing the inputs through one pair of twisted wires from the first chip to the outputs of the second chip - in first time frame, then doing the same in the opposite direction in the second time frame.

Reply to
aleksazr

They're called FPGAs, but the configuration can be a bit of a chore...

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Reply to
Tim Wescott

Not enough information, sir!

"3 signals and input 2"? Three outputs and two inputs, maybe?

(all 1 MHz)? Do you mean that each one, at top speed, can have a 1MHz square wave (i.e., a 500ns on-pulse followed by a 500ns off-pulse)? Or do you mean that each one, at top speed, can have 1 mega-baud data on it? Or something else?

What is "relatively noisy?" Relative to what?

What is "too big"? Obviously, you feel that 28 pins is too big, but what's your threshold?

What system are you putting this in to? Are you trying to paste something onto existing boards with minimal changes? Are you doing a brand new design? Are you trying to hang this on the outsides of existing boxes without loosening a screw? If you're doing a new design, or a significant spin, what sort of communications possibilities are already on the boards (microcontrollers, FPGA, etc.)?

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My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
Reply to
Tim Wescott

Damn, so no-one finds that sort of thing interesting enough to produce it.

Reply to
aleksazr

Yes... didn't I mention that in the first post?

1MHz square wave.

Ah, you got me there. Dunno. It all depends on where the owner will put the final product.

It can be in his house, but also in his garage, or inside a factory where he cuts steel. (for example)

When I just see a number, 28 - it looks big. (a DIP pops to my mind) Having checked the footprint, its only 10*8mm - not that big after all.

But its expensive, Farnell has it at ~10EUR for sender. Thats about 40 EUR for two-way comm - too much.

On one side I'm creating a new design, and on the other I'm inserting new components.

You did mention FPGAs here and in one other post in this same thread. Yes, I have a FPGA on the main board.

The slave board doesn't - I could put a CPLD there. Not sure, though, if the logic will fit inside the CPLD.

Guess I will have to try and see.

Reply to
aleksazr

Depending on your latency requirements you may be able to do something with RS485 an one pair of lines, or RS422 and two pairs. If you could figure out a solid framing scheme, then cramming the whole thing into a CPLD may be quite doable.

Some FPGAs come with LVDS drivers -- but as its been ages since I've had to go shopping for FPGAs, I couldn't tell you exactly where to look (beyond the Xilinx and Altera web sites).

Reply to
Tim Wescott

You might look at some of the RF stuff. There are RF transceiver/modulators which do something along the lines of what you're asking (and you can easily omit the antenna and just run wire between the sides), but it's not an area I pay a lot of attention too.

Is the latency and jitter critical? Can you just run an Ethernet connection?

Reply to
Robert Wessel

I do not understand your specifications.

If you have two receivers, each of which expects data from three different sources, six pairs (12 wires) are required, not ten wires.

If the sources are synchronized in some way, a single RS-485 system (two wires) should do the trick.

Reply to
upsidedown

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