Keil C51 and register banks

I have inherited a nasty bit of Keil C source for 8051. The source uses the #pragma rb(x) statement to indicate to the compiler the register bank to be used ( is this right ? ).

Which brings us to the actual questions ..

1.) To which part of the source does this pragma apply and for how long ? 2.) What register bank is used for code that does not use this prgama ? 3.)What is the implication of having a(),compiled with #pragma rb(0), call b(), compiled with #pragma rb(1)? 4.) What happens to all this bank switching durin interrupts ?

Thankx to all you '51 ghurus out there in advance ...

John Eigelaar

Reply to
John Eigelaar
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It's at least 15 years ago. But as i remember it's a macro inserting registerbankswitching opcode. It's valid until the next time the #pragma macro is passing by.

Default is 0, but the whole processor is switching so all code will be using the new bank. B.t.w. are you sure the 8051 can switch banks, i used it for

80537 which had 4 registerbanks.

Conditional pragma's are not possible as far as i remember. While writing C code you should be sure what bank to use.

Nothing, or switching to 0, look in the spec's of your processor. As said the 8051 maybe has no bankswithing at all :-) I used bankswitching for handling fast interupts: at startup you fill all register banks with needed values, start up the main loop with bank 0, entering the interupt routine the first thing i did was switching to bank 1. This is much faster then exchanging all registers using globals. At the end of the interupt routine i switched back to bank 0 en left. In this way the interupt routines (the 80537 can handle several, with different priorities) has it's own 'virtual' registers.

As said, it's also history for me. I hope you can mange the problem. Goodluck!

Cu Jack

Reply to
Jack

In article , John Eigelaar writes

It's in the manuals. Get An eval CD

/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ \/\/\/\/\ Chris Hills Staffs England /\/\/\/\/\ /\/\/ snipped-for-privacy@phaedsys.org

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Reply to
Chris Hills

Thanx for the response.

As with most things in life nothing is what it seems. My problem turned out to be nothing to do with the compiler but rather a good old timing bug.

Good to know about the bank switching though...

Reply to
John Eigelaar

Hallo John,

This pragam tells the compiler which registerbank to use with direct adressing. You can tell the compiler not to use direct adressing of registers at all. You dont need this pragma then (does no harm though) - but it will slow down your code.

...

001E FA MOV R2,A 001F FB MOV R3,A 0020 C002 PUSH AR2 0022 C001 PUSH AR1 ...

In the code snippet above the MOV instructions are using indirect register adressing. The registerbank ( in this case 0) depends upon the setting of a control register (dont know which one - look it up up in the manual). There is no indirect register version for the PUSH instruction on the 8051. The compiler has to know which bank it is working on to push registers on the stack (notice the AR2 = Absolute Register 2). Workarounds are used when direct register adressing is not enabled.

If your program behaves funny, disable direct register adressing in compiler options (either command line, a pragma or a setting in uVision) and try again.

HTH Markus

Reply to
Markus Mandl

The Keil toolchain also allows users to select which register bank they wish to use for ISR's via the 'using' keyword.

Edw> John Eigelaar wrote:

Reply to
Edwin Bland

until it sees another one

bank 0

Not sure

The bank will not switch unless you use the "using" Keyword on the interrupt.

This is good not bad. This means the interrupt does not have to push upto 8 registers on to the stack. Note that the registers are actually the internal RAM (bank 0 is the 1st 8 bytes) so each bank you use cost you 8 bytes typical use is bank 0 for normal use and 1 bank for each level on interrupts.

You could Post on the forum at

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for more details.

Reply to
Neil Kurzman

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