8051

Take a look at the FreeRTOS.org Cygnal (Sillicon Labs) port. The source code can be downloaded.

Why? What are your requirements? Preemptive or cooperative? New, or a port of an existing OS? FreeRTOS has been ported to the 8051, so unless it's a s*h**l p*oj**t, why not use that?

You mean you know how to do all of the OS... apart from the most important bit ;)

Depends on your application tasks and their usage. Only you can say.

The 8051 is a target that most RTOS vendors avoid, with good reason. Hell, we've ported an RTOS to the PIC18, but even we weren't mad enough to consider the 8051. I certainly wouldn't do it for fun.

pete

I would have thought the PIC18 would have even worse than the 8051.

Ian

Have a look here:

Ian

That would have been my thought as well.

Hi

I've designed and used a minimal RTOS for the last 15 years I call it RTE51 (Real Time Executive). Because of the way that it is used, it is fairly immune to latch ups. It can execute up to 8 task preemptively

. I use register bank 0 for all the tasks, this leaves the other register banks free for interrupts. This however means that I have to copy the contents of register bank 0 to xram during context switching. This adds some latency to the context switching but it saves a tremendous amount of stack space.

I've originally used it with PL/M51 but changed it later to work with KEIL-C which I use extensively. A later change and experiment that I made was to add an additional layer that enabled me to put a task to sleep. These task can be woken after a certain time or after reception of a telegram.

On the original version, once a task have been scheduled, it must execute till it is finished. Higher priority tasks can however preempt lower priority tasks which makes it preemptive.

What might be of interest to you is how to get from an interrupt routine. As you know once you enter an interrupt routine on the 8051 a flag is set which prevents the 8051 from entering a same priority interrupt again. This flag is only reset once the iret instruction is executed but then control is passed back to the program from where it interrupted. With a RTE you would normally want to pass control to the executive after execution of an interrupt. The following snippet shows how to release the 8051 to again be able to interrupt while entering the scheduler and thus reducing latency:

;###################################################** ;* * ;* Call here from 'c' interrupt routines * ;* in order to execute tasks * ;* * ;###################################################**

RteIntExecC: mov r1,#2 sjmp rie05

;###################################################** ;* * ;* Call here from PL/M interrupt routines * ;* in order to execute tasks * ;* * ;###################################################** rte_int_exec_us1: rte_int_exec_us2: rte_int_exec_us3: mov r1,#4 rie05: clr ea ;dissable interrupt mov a,sp ;remove redundant stack clr c subb a,r1 mov sp,a mov a,#low rie10 ;restore the interrupt priority push acc mov a,#high rie10 push acc reti ;the interrupt is over rie10: clr c ;change to register bank 0 mov psw.4,c mov psw.3,c sjmp r_e05 ;regular task scheduler

;#############################################** ;* * ;* Call here from task or background * ;* * ;#############################################** RteExec: rte_exec: push acc ;save register PL/M style push b push dph push dpl push psw clr ea ;dissable interrupt . . ; this is where teh scheduler starts

If you're interested, I can e-mail the assembler code to you.

Regards Kobus

yes I want it , it can be useful for me. I decide to implement a Round robin schedular with only 8 task as well. Also I think I am goint to use C , so I cant use register bank 0 also 1 as I see.(functions use them) zibidi

zibidicigim neden 8051 kullaniyorsun. (Silicon labs in 100 mhz lik 8051 leri hari=E7) Yok illa RTOS yazacam diyorsan bisey demem de ama ARM kullansan freeRTOS ida port etmisler bak ne hos.. Zati C de yazacakmissin.. oh kebab yaa

zibidicigim neden 8051 kullaniyorsun. (Silicon labs in 100 mhz lik 8051 leri hariç) Yok illa RTOS yazacam diyorsan bisey demem de ama ARM kullansan freeRTOS ida port etmisler bak ne hos.. Zati C de yazacakmissin.. oh kebab yaa

Couldn't have said it better myself... ?!?!?

Meindert

It depends which 8051...

The problem for a pre-emptive OS is stack. No 8051 variant has a stack greater then 256 bytes (and in practice it is rather less). Some OS get round this by using XRAM to save non running processes' stacks but this is slow.

Most (all?) PICs have a fixed, inaccessible and rather small stack which makes it harder to write an RTOS IMHO.

Ian

The other problem is the lack of data pointers on the 8051. The pic18 have 3 I think so you can easily make your own data stack and plenty on onboard ram to accomodate it.

Technically the 8052 family.... the 8051 did not have the upper 128 IData space. though I don't know of any of the 51 familty that don't have it now

I once got asked if I could supply a full TCP/IP stack for a PIC!!

The 8051 is far friendly than PIC18.

The 8051 has a real stack in RAM that can be far larger than the PIC18. The PIC18 has a fixed stack size of eight while the 8051 could easily have a stack size of 128 bytes. Thats a big deal for an RTOS.

The 8051 has no banking to deal with either. Why do PICs STILL bank. The 8051 replaced the 8048 that had banking. A renovation that happened in

"fairly immune to latch ups?" That doesn't sound good. I would only use an RTOS that _never_ "latches up".

Hi Meindert, I just tried to convince him to use ARM with freeRTOS. But it seems you know Turkish a little bit. or you see "kebab" and guessed it is Turkish...

Wel, to be honest, I didn't understand one single word of it. I didn't even notice the word kebab... :-) In the Netherlands there are a lot of people who are form Turkey or have their roots there and therefore we see Turkish subtitles on television quite regularly. So I could have guessed it was Turkish...

Meindert

BZZZZ! --- and thanks for playing ;-) Check out the DS80C390: 1 kB of dedicated stack space. And it's even in on-chip XDATA memory so it doesn't even eat up valuable IDATA.