Greetings;
I cannot find (on the 'Net) a comprehensive description of how ports 3 and 4 on a ROMLESS 8096 could possibly be used without port reconstruction (external memory-mapped i/o to latches) and even if the ROMLESS parts included the port circuits and attendant pullup/pulldowns. There are differences with 80c196 family parts so I can't rely on the description for them. A cryptic datasheet for the 8096-90 48-pin package shows ports 3 and 4 muxed on the A/D bus but doesn't distinguish between the 8095 (ROMLESS) and 8395 variants. To use ports 3 and 4, no external accesses are permitted on the bus, data and instructions must reside internally (ROM, register file) and there will be no bus control signals emitted during port access (ALE, RD, WR, etc.) and EA must be deasserted (which becomes a non-sequiter for a ROMLESS part).
There is no way to qualify that port data is on the bus when there are no control lines to say so. The datasheet describes a mixed-use condition for A/D and port data on the bus so this is confusing -- unless port reconstruction is implied here.
On a ROM-based part, this is not an issue.
Does anyone have experience with this situation?
Regards,
Michael