How To Synchronize FPGAs

Hello newsreaders,

For a while I have been confronted with the following task which I find quite challenging but unfortuantely didn't manage to solve it, yet. What I want to do is to use 2-4 FPGAs (Xilinx Virtex 2 Pro) together on one printed circuit board (PCB). They are used to process a large amount of incoming serial data (data rates of several GHz's). My idea is to handle that data parallel by the 2-4 FPGAs. But now there arises the problem how to adequately split the data and how to synchronize the FPGAs among one another, in particular? Is it possible or first of all a realistic idea to synchronize multiple FPGAs in the GHz range? How can this be done without much protocoll overhead? I would like to do it without applying an extra transfer protocoll among the FPGAs just for that purpose! Up to this date I didn't find a proper solution, yet. Maybe someone can give me a hint? Any ideas how to solve that problem?

Regards, Leroy Tanner

Reply to
Leroy Tanner
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Perhaps comp.arch.fpga is a better place to post your question.

Mostafa

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Mostafa Kassem
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Reply to
Mostafa Kassem

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No, it isn't reasonable. Assuming 'several' means 3, a wire length of about 2 inches (5 cm) would represent a complete clock cycle in down and back time, so the devices would have to be mounted within about 1/10th of that for any hope of reliability. Then there is the problem of clock skew, which has similar limitations.

Thus you are pretty well limited to protocols that expect delay and handle it, probably by some form of pipeline.

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Reply to
CBFalconer

FPGA are parallel in nature internally. Unless you are maxing out on the gates, I don't see any advantages in external parallel processings. You can alway split functionalities among FPGAs, with a single serial front-end. If you are un-powered by a factor of 2 to 4 only, wait a couple of months for a newer and bigger FPGA.

Yes, but many designers hang out in both places.

Reply to
Linnix

"Linnix" :

It's not a matter of the FPGA fabric but the physically accessible I/Os! That's why I thought about parallelize some tasks onto several FPGAs..!?

Reply to
Leroy Tanner

"CBFalconer" :

Hi, thanks for your reply. But what about that calculation? Could you please elaborate on that? As far as I know I should be (lambda = c/f) ????

Regards, Leroy

Reply to
Leroy Tanner

You could use a proper clock distribution tree built around microstrip or stripline transmission lines, in which each branch has identical length. If Wilkinson power dividers are used, the power drops by 3 dB into each branch and if a constant voltage is needed, the subsequent sections would have to have a higher impedance.

In a stripline transmission line on G10 material, the propagation speed is less than 0.5 c. With teflon board the propagation speed is closer to c.

A mismatched transmission line longer than about 1/10 wavelength would mess up the pulse shape. With a mismatched length of 5 cm, the full wavelength would be 50 cm on G10 and corresponding to more than 1 m wavelength in free space, which would correspond to a 300 MHz frequency.

Paul

Reply to
Paul Keinanen

It's very simple. It takes about 1 nanosec for light to travel 1 foot, or about 25 cm. Signals on a line (which all signal propagation is) takes longer.

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 "It is not a question of staying the course, but of changing
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Reply to
CBFalconer

There are two ways to approach this problem: (1) have each FPGA perform a part of the process on the entire data stream or (2) have each FPGA perform the entire process on part of the data stream. We once implemented (2) for a bandwidth expander where each chip did the complete process (one clock cycle Huffman decoding, translation of the code to a value, then arithmetic processing) for a portion of the incoming data stream. Each chip was provided a chunk of the incoming data (e.g., in a two-chip system, chip one processed chunks 1,3,5,... of the data and chip two was processed chunks 2,4,6,... of the data). We actually used two on the board because of I/O bandwidth limitations, but the chip was designed to allow for 1,2,4,or 8 chip operation.

-=Dave=-

Reply to
dave

"Paul Keinanen" :

Aaah, once again. Unfortunately I didn't get it..!?!

lambda = c / f c= 300.000 km/s f = 3 GHz for example, then the wavelength should be

lamba = c / f = 300000/3000000000 = 3/30 = 10 cm!!!

I assume this result is correct by all means. Where does the material come into play???

Reply to
Leroy Tanner

This is true only for free space (and quite exactly for air). With other insulators,the situation is different.

For instance, look up the velocity factor for various coaxial cables with PE insulation, the velocity factor is 0.66, the signal propagates at about 200 000 km/s in that coaxial cable.

Also light propagates at different speeds in different materials. Put a spoon in the tea cup and it will appear as if there is a bend at the surface. In reality, this is due to the fact that the water has a lower propagation speed than air and thus there is also a difference in refractive index.

Paul

Reply to
Paul Keinanen

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