exception handlers and PIC (x86)

Sep 11, 2003 2 Replies
B

hello,



this is probably a silly question. however, i haven't found explicit information on the web and i need straight forward clarification.



question 1: obviously, if the PIC is initialized to require manual EOI, the PIC must be acknowledged by sending EOI from the hardware interrupt handler. however, i'm not sure if this is always required or only required if higher priority hardware interrupts are to be serviced (nested). what is required for either condition?



question 2: do cpu exception handlers need to send and EOI to the PIC? i would think not, and may cause problems i would think. i'm wondering because i saw the unsubstantiated usage as such.



question 3: the same question at question 2 only regarding software interrupts called by INT n.



thanks, bryan


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J

On Thu, 11 Sep 2003 17:21:42 GMT, "Bryan Bullard" wrote in comp.arch.embedded:

It is always required. If you do not send EOI from the handler to the PIC, that particular interrupt can never trigger again and all lower priority interrupts are blocked.

CPU exception handlers do not come from the PIC, the PIC knows nothing about them, and your PIC should be programmed to use interrupts above those reserved for internal use, although the original IBM PC didn't.

The same answer applies for invoking interrupts by INT n. The PIC does not see them, does not know about them, and should not be send EOI for them.

But if you don't send an EOI to the PIC for an interrupt that occurs, that interrupt can't ever trigger again, and all lower priority ones are blocked forever.

Jack Klein Home: http://JK-Technology.Com FAQs for comp.lang.c http://www.eskimo.com/~scs/C-faq/top.html comp.lang.c++ http://www.parashift.com/c++-faq-lite/alt.comp.lang.learn.c-c++ ftp://snurse-l.org/pub/acllc-c++/faq
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B

thank you for your reply.

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