CSTN panel Front/Back Porch timings

I am working on a display project for a CSTN panel. One piece of information that is unclear is the correct value for the horizontal timings.. The fields that needs to be set are:

Horizontal Back Porch ( HBP ) Horizontal synchronization pulse width in terms of LCD_PCLK cycles ( HPW) Horizontal Front Porch ( HFP )

This seems to be a hardware specific question for the displays but if you can answer that would be excellent! I've included a link to the datasheet below:

formatting link

I tried all values of 0 because that is what seems to match the best with the datasheet timings. I then tried different combinations of settings and the screen changed dramatically in each new setting. But no luck on getting the screen to work. The tech support from the manufacturers has been worthless! Hope someone can help!

Thanks!

-Henk

Reply to
dutchman1234
Loading thread data ...

Your data sheet looks remarkably similar to one we used recently from Truly. The timing appears to be a copy from the same driver chip manufactures data sheet. Their support was also essentially worthless.

If anyone knows differently please post a correction, but generally on a CSTN display the front and back porch timings are generally very small. I think yours shows 1.2 uS. I believe this is because the CSTN displays are pretty much a pure digital system. You are shifting data into a set of serial to parallel latches that hold the data for just a single line time. The important point is to make sure you have the exact right number of clocks per lines, lines per display, etc. Also keep the refresh rate high. Most of what we found is that 72 frames per second is about the minimum to prevent flicker.

We had a great number of problems also, but they mostly involved inconsistencies between the SOC controller spec sheet and the SOC chip manufacturer supplied driver that included macros that did not function as the documentation claimed. Neatly labelled as "use at your own risk".

Scott

Reply to
Not Really Me

Scott thank you very much for the post. I will double check the number of pixel clocks per line to be sure things are working correctly. From what you can can tell would you say the values for the HBP, HPW, and HFP be close to zero?

What type of micronprocessor were you working with? What type of controller? Would you be willing to consult with me for a few hours? We will pay you. :)

-Henk

Not Really Me wrote:

Reply to
dutchman1234

CRT like timing parameters do not apply to this device. It expects something like sequential read from framebuffer data.

--
 JosephKK
 Gegen dummheit kampfen die Gotter Selbst, vergebens.  
 Click to see the full signature
Reply to
joseph2k

Our project used a Sharp 75420. We found the supplied header files misleading, but compounded by the extremely poor CSTN manufacturer docs.

Yes, we can consult on your project. You can reach me by replying to an edited version of the email address attached to this message. The changes should be obvious.

Scott

Reply to
Not Really Me

a

We have been using the Sharp 75410 and found the definition of some pins to be wrong. They were different in the description of the colour parts. This wasted one interation of board and part of my scalp.

Peter Wrong information is worse than no information at all. At least in the latter case you know that you don't know.

Reply to
Peter Dickerson

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.