BGA Footprint

I am looking at designing a board with a 256 ftBGA. I haven't used a BGA before in layout and I'm not sure what rules I should use in setting the dimensions of the pads and solder mask openings. A paper by Lattice recommends "PCB solder pads match the cor- responding package solder pad type and dimensions". But they don't give full details.

For this part they say the package is SMD (solder mask defined) and specify the pad diameter as 0.5 mm. Then they say the "PCB (SMD) Solder Mask Opening" should be 0.4 mm. They also specify "PCB (NSMD) Solder Land Diameter" at 0.35 mm.

Should I assume the package solder mask opening matches the PCB number provided, 0.4 mm? Why do they specify the NSMD pad size rather than the SMD pad size? It just seems odd they way they have worded this.

How do you design pads for BGAs?

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Rick
Reply to
rickman
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While 256 hints at a 1.27mm pitch BGA it can help if you can give this (key) detail. I have done plenty of the latter and can help with these, there are restrictions and myths which one can do without.

Dimiter

Reply to
Dimiter_Popoff

Sorry, it is a 1 mm pitch BGA. There are some I'm looking at that are

0.8 mm.
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Rick
Reply to
rickman

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-Lasse

Reply to
lasselangwadtchristensen

Thanks a lot. I hadn't found that one. The thing I am concerned about is the note in the Lattice document about matching the pads between the package and the PCB. For example, the Lattice package has 0.4 mm pads and the Xilinx doc suggests 0.381 mm pads. How much would that deviation matter?

I have tried asking my board vendors about recommendations and they don't have anything to offer. They'll build what ever I give them. lol Obviously it is better for me to give them a board that is easiest to build.

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Rick
Reply to
rickman

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think is is just rounding to whole mils, the numbers on page 16 is 0.4mm

you should probably ask assemblers not board vendors

we've haven't had problems just following the datasheet

-Lasse

Reply to
lasselangwadtchristensen

5% difference. That's why I'm asking, is that significant in this situation? Lattice indicates the pad design on the PCB should match the package (SMD). If I make the pads 0.4 mm, the trace/space is now below 5 mil which may make the board cost more. But then they are running two traces between pads which maybe I don't need. I'm upgrading from a 100 pin QFP because they are obsolete. I can almost certainly get the I/O's I need in the first two rings of pads. I just need to add vias to get power and ground.

Same people.

Which one? That's my point. Lattice gives info that is not so clear, but seems to differ some from the Xilinx info. The Lattice and Xilinx packages may not be identical.

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Rick
Reply to
rickman

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