AVR interrupt: how long a pulse do I need?

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I'm generating a pulse on the interrupt line of a AVR processor. When I
checked the datasheet to find out exactly how long a pulse I need for an
interrupt to be recognized as such I couldn't find it!

I assume that an interrupt has a similar timing to that of a normal digital
I/O port but I couldn't find any timing diagrams of that either. The setup
and hold time for the digital I/O are completely lacking from the

Can anyone fill me in on this? Thanks in advance.

Re: AVR interrupt: how long a pulse do I need?
From the ATMega169 datasheet:

The External Interrupt 0 is activated by the external pin INT0 if the SREG
I-flag and the
corresponding interrupt mask are set. The level and edges on the external INT0
pin that
activate the interrupt are defined in Table 47. The value on the INT0 pin is
before detecting edges. If edge or toggle interrupt is selected, pulses that
last longer
than one clock period will generate an interrupt. Shorter pulses are not
guaranteed to
generate an interrupt. If low level interrupt is selected, the low level must
be held until
the completion of the currently executing instruction to generate an interrupt.

The INT0 interrupts can be triggered by a falling or rising edge or a low
level. This is set
up as indicated in the specification for the External Interrupt Control
Register A –
EICRA. When the INT0 interrupt is enabled and is configured as level triggered,
interrupt will trigger as long as the pin is held low. Note that recognition of
falling or rising
edge interrupts on INT0 requires the presence of an I/O clock, described in
“Clock Systems
and their Distribution” on page 23. Low level interrupt on INT0 is detected
asynchronously. This implies that this interrupt can be used for waking the
part also
from sleep modes other than Idle mode. The I/O clock is halted in all sleep
except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down,
required level must be held long enough for the MCU to complete the wake-up to
the level interrupt. If the level disappears before the end of the Start-up
Time, the MCU
will still wake up, but no interrupt will be generated. The start-up time is
defined by the
SUT and CKSEL Fuses as described in “System Clock and Clock Options” on
page 23.

Re: AVR interrupt: how long a pulse do I need?

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Hey Doc,
    For the Atmega16, at least, that depends on what sort of interrupt you
have, how fast your I/O clock is running and (sometimes) whether the AVR's
asleep or not.  According to the datasheet, the AVR recognises its edge
triggered external interrupts on an edge of the I/O clock (not sure which
edge).  This means that for an edge triggered interrupt, assuming the
interrupt is asynchronous, a pulse > 1 I/O clock should do the job.  If
you've used a level triggered interrupt, the data sheet says that even when
the I/O clock isn't running this will be triggered by being sensed low for
two cycles of the watchdog clock (nominal period 1 uS).  Reading between the
lines I'd suggest that if not in sleep mode, two cycles of the I/O clock
would be used instead.
    This info *is* in the data sheet, though strewn hither and yon and well
hidden in places you wouldn't expect it instead of in AC Electrical
Characteristics as it would be in the datasheets of more conventional
    This may be different for the AVR that you're using particularly if it's
from a different family (Tiny for instance).


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Re: AVR interrupt: how long a pulse do I need?
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In addition to the excellent responses already sent, note that for level
sensitive interrupts, if the level goes away before the interrupt
response, it won't be recognized.  This makes the delay dependent on how
long the code has interrupts disabled and the processing time of higher
level interrupts, as well as instruction time and sleep wakeup time.


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