ARM926ejs based Soc memory map

Dec 17, 2010 2 Replies
F

Hi all, I am new to linuxarm based developement. Now I use arm926ejs based Soc which contains flash, dram interface pins. In linux the base address map for all peripherals is given. for ex PCI 0xF100 0000 DRAM 0xF200 0000 FLASH 0xF400 0000



I would like to know how these values of base address is selected? If I look at the schematics of the board, there no address pin connections directly?


Basically I understand that the dram, flash and all memory mapped, their top most bit will be connected to chip select of the chip, so from that we calculate the base address.


But for this in schematics I did not get how many address pins totally uses for interface?


Is in linux it is done in different methodology? Kindly guide. Pls do share if any doc/url to learn.



rgds, yaj


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A

Consult the datasheet or programming manual for your SoC device. These peripherals are internal to the device.

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G

On some chips they're hard-wired by whoevere designed the address decoding and bus-controller logic inside the chip.

On others, there are registers in the chip's bus controller blocks that you can write to to set the base address for the various external chip selects.

I don't understand your question. How would I know what you see when you look at the schematics of the board?

I don't know what you mean by that. The SoC has built-oin bus-controllers and address-decoding (chip select generation) logic. You need to read the documentation for that.

No idea what you mean. The SoC's address-decoding and bus-controller units determine the base addresses for the external chip selects.

Read the users manual for the chip you're using.

Grant Edwards grant.b.edwards Yow! PEGGY FLEMMING is at stealing BASKET BALLS to gmail.com feed the babies in VERMONT.
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