Active Low or Active High

Hi all,

We all know that microprocessors/microcontrollers have active low & active high signals.Is there any specific advantage for active low signals?Can't it be all active high or active low?

Reply to
Harry
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Most digital logic is edge-triggered or edge-sensitive, meaning one edge is the trigger and the other isn't. The important edge must be the fast one, and some technologies, such as TTL, pull faster edges in one direction than the other.

As a result, TTL tends to use active-low, since it's the high to low transition that's the fast one.

Clifford Heath.

Reply to
Clifford Heath

For microcontroller outputs that drive things in the real world, one thing you might want to look at is any internal pullup / pulldown resistors. It can be an advantage if you design your outputs so they are automatically pulled to the "off" state during reset.

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John Devereux
Reply to
John Devereux

Broadly yes. In the details it can matter : If you are driving a LED, the LED polarity dictates your active level. Ditto for if you are driving a NFET. If you want to "OR Wire" a BUS, that usually points to Active-Low, Open-Collector topology in the simplest form. NFETs drive more than PFETs on a same-area basis, so if you want highest drive, into relays, or Solenoids, that's usually NFET active low.

-jg

Reply to
Jim Granville

Yes, the Select lines, Reset lines and many others are active low. Especially the control signals are active low. This is because, most logic families can sink more current than they can source. That is, because of this, the logic gate output will be high to drive a number of inputs of other logic gates of the same type.

Karthik Balaguru

Reply to
karthikbalaguru

Read the datasheet and figure out whether the pins are high, low, or floating during and right after reset. Then design so that is the safe condition (motors off, etc.).

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Guy Macon
Reply to
Guy Macon

It is the deep historical and religious question. It has to do with the fact that for the ancient 74xx series the outputs normaly act as drains, and the inputs act as sources.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

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Reply to
Vladimir Vassilevsky

I always thought that it went way back, in relay circuits. I have an idea that it was so you could not easily short the supply to ground and pop fuses.

Martin

Reply to
Martin Griffith

Back in the day, TTL inputs floated high. Therefore interface signals were often made active low so that they would float to the inactive state.

These days, CMOS logic inputs don't typically float high, so there's no overriding reason to use active low. Active high is more "common sense" so it tends to get used more on new designs, but there are still alot of interfaces that were spec'ed in the TTL days.

So, you'll see both active high and active low.

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Grant Edwards                   grante             Yow! I have a very good
                                  at               DENTAL PLAN.  Thank you.
                               visi.com
Reply to
Grant Edwards

There were other causes, too.

The noise margin of a TTL high is much larger than the noise margin of a low.

Selecting low active minimized the risk of data corruption in inactive parts by noise.

Also, before three-state TTL chips, a bus was built using open-collector elements, which made passive high a necessary selection.

Been there - done that (about 40 years ago).

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Tauno Voipio
tauno voipio (at) iki fi
Reply to
Tauno Voipio

Mustn't forget other open-collector families such as DTL...

Regards,

Michael

Reply to
msg

The active low was very common on old bipolar logic families, such as RTL, DTL or TTL.

Since in those days it was not practical to make both NPN and PNP transistors on the same chip, so only NPN transistors were used. The output stage was a Common emitter NPN stage and it was easy to drive current into the base of the NPN, putting the transistor into saturation, with a large current flowing from collector to emitter with a low voltage drop, thus the output is low, when current flows into the base of the output transistor.

It would be very hard to make an active high output stage, since an emitter follower transistor with the collector at Vcc and the output at the emitter. You would actually need an additional supply voltage higher than Vcc in order to be able to drive sufficient current into the base of the NPN transistor in order to get the output voltage even close to Vcc.

Of course ECL used NPN emitter followers with negative Vee at -5.2 V, but that was an oddity.

Paul

Reply to
Paul Keinanen

The original relay circuits were mostly used in positive ground telephone circuits, so it is the high condition that is less likely to short out and blow fuses.

It's an interesting story as to how it came to be that telephones are mostly positive ground and modern cars are mostly negative ground. When Michael Faraday did his pioneering work on electrolysis he determined that what we now call the positive electrode (anode) lost material and what we now call the negative electrode (cathode) gained material. So he called the electrode that was putting material into the liquid positive and the electrode that was taking material out of the liquid negative. He had no way of knowing that there were electrons moving from negative to positive and ions moving from positive to negative.

Because whichever part of the system is negative gains metal and whichever part of the system is positive loses metal, the designers of the telephone system made the ground positive, because in a telephone system, ground stakes are a lot easier to replace than wires are. In automobiles, body and frame parts are harder to replace than wires are, so the automotive designers eventually settled on negative ground.

Telegraphs had a different system: a battery on each end. This resulted in negative ground at one end and positive ground at the other end, and ground halfway between positive and negative somewhere in between.

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Guy Macon
Reply to
Guy Macon

Actually the immediate predecessor (to NPN DTL gates) were PNP DTL gates, which swang between a negative voltage and ground. However, the ground level was still the power direction. They went out about 50 years ago, but reappeared in early PMOS designs.

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 Chuck F (cbfalconer at maineline dot net)
   Available for consulting/temporary embedded and systems.
Reply to
CBFalconer

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