RD and WR signals

Why not?

Which device are you talking about?

How may other devices have you looked at that make you believe what you ask?

Do you think that is true for all devices with read/write inputs (or, for that matter, outputs)? Why, or why not?

Richard

Never seen that, except as in R/W*.

Tam

It's been a long time since I've designed an HD controller chip but, IIRC, some chips had separate Read and Writebar capability, but with the most common use as tied together.

...Jim Thompson

They usually AREN'T actually except where it's one signal ( RD/-WR ) and separate chip enables are used..

Both are normally active low. However you can design things however you like.

Graham

Most architectures that I have worked with in recent years have had separate active low read and write signals. The F2812, which I have used most recently has both separate read and write in addition to a RD/~WR.

In answer to your question as to why the WR would be active low, I suspect it goes back to the 74LS logic days (and before) when active low was considered to be more noise immune. Since writing is potentially the more critical action since you are most likely destroying data, it would make sense to assign it to the supposedly safer control signal.

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Interesting :):) !! Thx for that info. It makes sense if it linked with Control Signal.

But, Do you mean to say that nowadays both active low and active high are immune to noise and in earlier days only the active low was immune to noise ? What were the changes in design done to make the high signal to become immune to noise ? Any ideas ?

Thx in advans, Karthik Balaguru