8255 chip mode 2 question

James,

if you are changing modes with the 8255 be very careful. It appears to have a feature whereby the values written to output ports are lost/changed when the mode register is written to.

You appear to be describing (but I could be wrong) using one of the ports as I/O and changing modes of the 8255 to switch the port from input to output mode and vice-versa. I tried this technique but ran into a known "feature" of this device.

It is a long time since I used this part and suffered from this problem. I have more reecntly seen this issue raised in various newsrgoups. I suggest doing a search to confirm and correct my first paragraph (or perhaps someone can post a more accurate summary of this feature).

regards...

--Gary

Hi,

I think I did not make myself clear. I am trying to avoid mode switches. The 8255 datasheet says that you are allowed to have a combination of modes for Group A and Group B ports. What I want to do is set port A to mode 2 so it is bidirectional. That would allow me to read/write data to the data bus without doing a switch each time. So I will set Group A (port A and high nibble of port C [bits C4-C7]) to mode 2. That leaves Group B which is the low nibble of port C [bits C0-C3] and all of port B. I will set group B to mode 0 with the port C nibbles in output mode. So far, so good. The issue I would like help in elucidating is that I need a 4-bit address bus for which I will be using port C (C0-C3) in output mode, like this:

device 8255 port 8255 mode

------ --------- ---------

Ad0 have a feature whereby the values written to output ports are lost/changed

[snip]

I did some more research and it seems that to implement the bidirectional data transfer (mode 2), one has to implement the control signals also on port C. Does anyone know if this is correct? I was assuming that one can simply write and read to/from port A without using these signals.

JM

Sorry James, but it won't work the way you want. When Port A is set to Mode

2, 5 bits of Port C (Pc3-Pc7) are set for control/status of Port A, leaving only 3 bits of Port C for the address output you intend. There's no way around this, just as you've seen in the data sheets.

You CAN, however, use all 8 bits of Port B (or only 4 bits, if you wish) to output the 4-bit address information to your device.

The 8255 in Bi-Directional I/O is rather cumbersome. It's further complicated by having to use the port in a 'strobed' configuration. In other words, writing data to Port A for output will not actually output the data until the /AckA signal (Pc6) is strobed LOW. Also, when using Port A for input, the data will not be latched into Port A until the /StbA signal (Pc4) is strobed LOW. In other words, you'll need to implement at least these two control signals in your 'simple' interface.

It seems as though you're looking for a 'transparent' I/O solution. Only Mode 0 operates that way; both Mode 1 and Mode 2 are 'strobed' (meaning control signals are necessary to actually effect the I/O operation.)

Terry

You just refreshed an OLD (over 20 years ago) memory.

As I recall, yes, to do bidirectional (mode 2) on an 8255, you have to do the control signals on port C.

Please check the handshake sequences carefully - the 8255 handshakes are not completely compliant with the usual two-wire handshakes.

And - yes - the port C is pretty completely reserved in bidirectional mode.

Brings memories since years - the 8255A is pretty stubborn chip to converse with. You might be better off with a couple of three-state buffers and latches and doing the handshakes with software.

HTH

Tauno Voipio tauno voipio @ iki fi