8051/2 data and iram memory question

Does iram overlap the 128 bytes of the data space or is it seperate?

In other words, does an indirect reference to 0, reference data at 0?

Reply to
PagCal
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What is it with you guys? Don't you read datasheets anymore?

Meindert

Reply to
Meindert Sprang

On Wed, 14 Dec 2005 05:27:47 -0500, PagCal wrote in comp.arch.embedded:

Overlapped.

Direct and indirect references in the range of 0 to 7F (hex) both reference the internal RAM.

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Reply to
Jack Klein

Yes

Reply to
Neil Kurzman

I'm new to these micros. This information is documented in a 'data sheet?' I'll go look.

Thanks for the tip.

Me>

Reply to
PagCal

Yes it is. Sometimes you'll only find hardware specs in the datasheet and you need something that is called an "achitecture manual" or similar to learn the architecture of the processor.

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is a good place to look for such a manual about the 8051 series. I could mail you one, but it's

14Mbyte....

I might have sounded a bit blunt in my reaction, sorry for that. It's just that I find it plain weird that people start working with a micro without studying the thing inside-out by reading the datasheet. But I guess these evaluation kits with pre-baked compiler environments are to blame for that :-)

Well, have fun with it and good luck :-)

Meindert

Reply to
Meindert Sprang

Some of the 8051 clones only list the differences from the standard. An8051 data sheet may be need to get the whole story.

Reply to
Neil Kurzman

What datasheet? The datasheet for the 8051 compatible device I am using (CY68013) does not make it clear if instruction RAM and data RAM are separate or overlap in the first 128 bytes. At least not that I can see.

The original 8051 datasheet won't help either, since the original 8051 didn't have iRAM. It had ROM.

Reply to
Bob

The MCS51 family manual tells you all this stuff. It describes the '51 family architecture and together with the device specific datasheets you can find anything you want to know about the '51 and it's derivatives. That manual can be found at (where else?) Intel's website:

formatting link

Meindert

Reply to
Meindert Sprang

I don't think so. The original 8051 didn't even have internal iRAM.

There are a lot of 8051 derivatives out there. My experience is that the datasheets leave some gaps.

Reply to
Bob

Well, maybe you mean something different with IRAM, but there is the internal data ram on the '51, which is 128 bytes in the 8031/51. And my compiler calls that idata, as opposed to xdata for the external data ram.

Meindert

Reply to
Meindert Sprang

a simple 1 minute google will turn up all the information you will ever need to work with any 8051 on the planet.

seperate?

0?

can

Reply to
Nappy

IRAM = internal RAM, not instruction RAM

Yes, that datasheet will help.

In 8051 terms, IRAM is a completely seperated dataspace. One part of this space is bit-, direct- and inderect-adressable, one part direct and indirect and one part only indirect.

This IRAM space was 128 bytes on the original IIRC and newer parts may have up to 256 bytes.

Then there is external RAM, XRAM, which is maximum 64kB (without paging) the address space is completely seperated from the IRAM and you even need different instructions to access it.

To add to the confusion, newer parts sometimes have XRAM on-chip. So you could call that internal external RAM :-(.

The Atmel AT89C51AC2 (for example) has 256 bytes IRAM and 1kB XRAM on-chip If you add external XRAM in the bottom of the address space, the bottom 1kB of the external RAM will not be used. So if you add a 32kB chip there, you will end up with 32kB of usable XRAM, not 33kB.

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Reply to
Stef

Actually, there are _three_ RAM memory spaces, identified in the compiler I used as data, idata, and xdata. The first is the first 128 bytes of internal RAM, which are accessible either directly or indirectly. The next (idata) is the second 128 bytes of internal RAM, and can only be accessed indirectly (thus idata readsas "indirect data"). Accessing this memory space directly gets you the SFRs rather than RAM. Then, as you say, there is external RAM (xdata), only accessible through (one of) your DPTR register(s).

IIRC, the linker was smart enough to bleed idata variables into data space if there was room, since data is indirectly accessible, but declaring a variable idata would force the compiler to access that RAM indirectly, since it had to assume it was in idata space.

I know that idata was not available on all version of the '8051' (I believe it was introduced on the 8052, BICBW). It _was_ on all the versions of the micro I actually used.

Regards, -=Dave

--
Change is inevitable, progress is not.
Reply to
Dave Hansen

The Intel 8051 Always had IRAM It was just a different way to address the RAM. Indirect as opposed to direct. MOV as opposed MOV @R0

Reply to
Neil Kurzman

A one minute Google search may turn up a datasheet for any 8051 on the planet. But those datasheets will certainly not contain *all* the information you will need. I have seen very few datasheets that didn't contain errors, omissions and ambiguities.

Reply to
Bob

Sorry, maybe I should have spelled out the acronym. I was assuming that iRAM meant "instruction RAM", but maybe others were using it as a synonym for "idata" (internal data RAM). In that light, what you were saying makes a lot more sense to me now.

On the original 8051, starting at address zero, it has 128 bytes of data. But also at address zero, it has ROM containing instructions. The original 8051 uses a Harvard Archtecture for internal memory, so these are separate address spaces.

Some 8051 derivatives replace the instruction ROM with RAM. You can modify the code on the fly. They may also add extra RAM, which, at least on the CY7C68013, may be used for either data or code. But not all of it. Over some portions of the address space the code and data are separate and some areas they are not. I have read over the datasheet serveral times, and at least to me, this is not unambiguously explained. The only way I was able to get a firm understanding of how it worked was to write some simple programs to poke values into memory and read them back.

Reply to
Bob

Do they? Which ones?

Ian

Reply to
Ian Bell

Examples are the Infineon C868, which boots from EEPROM into RAM, and targets ROM as the volume device, and a number of '51 USB devices ( TI and Cypress ) load into RAM - they do this, because the RAM is cheaper than FLASH, in the sizes & process involved, and RAM also gives a slight speed edge. Again, in this sector the really big customers can buy MASK devices.

-jg

Reply to
Jim Granville

Ah, now I see your problem too. I am not familiar with the CY type you mention, it is in fact new to me that derivatives exist with such a type of ram.

Meindert

Reply to
Meindert Sprang

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