Unfamiliar FET and capicitor schematic symbols

The circle on the FET inputs means that they're PFETs. (It's like the circle on an inverter output--they pull high when the gate goes low.)

I've never seen the capacitor symbol, but on a SWAG it looks like they're showing which end of the cap is the top metal layer. Rolled film and oil+paper caps have markings for which lead is the outside foil. (This makes a big difference in their vulnerability to capacitive pickup.)

Cheers

Phil Hobbs

It's the TUB connection... the TUB is the isolating region/diffusion/implant that the capacitor is built into.

It is likely a junction capacitance, but could be metal-over-Silicon (MOS).

Metal-over-metal (MOM) caps typically/simply include a label, "TOP" or "BOT" ...Jim Thompson

Interesting, thanks.

Cheers

Phil Hobbs

Mostly I roll my own symbols in such a way that I can be sure to get those tub biases correct in the schematic, such that they netlist correctly, critical to getting the Silicon layout correct, and getting proper first-pass chip performance ;-) ...Jim Thompson

I should have added that _symbols_ are simply visual aids for the human examiner... what matters is not directly visible on the schematic, the underlying _template_ which defines how the symbol netlists. ...Jim Thompson

In the case of that schematic there's a good chance that it was done by some drawing program, by whatever person was tasked with making the data sheet pretty.

PSpice Schematics DO netlist properly. ...Jim Thompson

On Tuesday, January 10, 2017 at 11:05:43 AM UTC-5, snipped-for-privacy@gmail.com wrote :

mbols I haven't seen before. One of them is an FET symbol and the other is a capacitor. These can be seen in Figure 32 on page 10 of the AD825 datashe et. The POS and NEG inputs each go the gate of FETs with this symbol. The c apacitor symbol is labeled Cf and are connected to VOUT. Not sure if whay I 'm looking at for Cf is unique symbol or it just indicates a layout feature .

Thanks very much for all the replies.

But did that schematic come out of PSpice?

I'm still running original-crispy-flavor PSpice Schematics before the OrCAD abortion and the Cadence take-over. Fabulous tool-set! ...Jim Thompson

Datasheet says, "With its unique input stage design..." and the draftsman is making sure we get the point. :-)

On the FET, + symbol just indicates back gate (tub) is tied to VPOS.

Likewise, on the capacitors, extra plate is the tub that the capacitor sits in... for your purposes, the stray capacitance. ...Jim Thompson