Win, where do they all come from ? (e-)

You weren't feeding the CMOS switch from a low-impedance source? Oh, that's too bad... :-)

--
 Thanks,
    - Win

Well in the real situation I am, but not at DC:

___ ___ GND -|___|-+-|___|-. | | | | | |\\ | 10u '--|-\\ | _/ | >-+------ .--||----o/ o--+------+--|+/ | | | | |/ | .-. .-. --- | | | Zg=1R 1G | | ---1n | | | +300nH | | | .-. '-' '-' === | | | | GND | | === | '-' GND | | | /| | | /+|-------- GND +------< | | | \\-|----+ | \\| | | | | || ___ | '---||--|___|--' ||

But there I have a track-hold-track sequence and I need consistency down to a few tens on nV between the 2 track phases.

233pC is 23uV across the input DC blocking cap after each hold step. Fortunatly I still can go the all discrete way, which I'd prefer have avoided, but this doesn't explain where do all those e- come from.

--
Thanks,
Fred.

Yes, only that's quite different from the cmos T-switch scheme used to improve high-frequency attenuation.

CMOS switches are made from paralleled N-channel and P-channel parts, with the gates driven by direct and inverted full-supply- swing logic signals. In early parts such as the cd4016, the two MOSFET switch substrates were tied to their opposite supply rails. For signals near each rail one of the two FETs would have very low resistance, thanks to its high Vgs voltage. But for signal voltages midway between the supply rails, each MOSFET had half the Vgs it formerly enjoyed, and the switch's Ron would peak at an undesirably high value.

In the late 60s RCA invented an improved circuit and fielded it in the 4066 replacement for the 4016. Their scheme was to switch the substrate voltage of the N-channel part away from -Vss, where it was tied during switch-OFF, and connect it to one of the input signals during switch-ON. The result was a dramatic reduction in Ron for signals in the mid-supply region, as can be seen in the three-region Ron curves. The technique of switching the substrate from Vss to the signal line and back has been used in virtually all cmos switch ICs designed and marketed since 1970, including the Motorola / ON Semi mc14051B. One feature I notice in the ON Semi schematic is that during switch-ON they tie the N-channel substrate to both inputs rather than just one, using two small cmos switches.

The problem with this substrate-switching trick, as you have very painfully observed, is the cmos switch that switches the substrate may have a short ON overlap time with the N-channel FET to Vss, which allows the circuit to grab a little bit of "dc" current from the signal pins at each switching time. Although most applications are not affected, some are. We old-time CMOS users first observed this issue shortly after the cd4066 and cd4053 were released in the late 60s. We discuss this in AoE, trying to give you a head's up.

You can still obtain cmos switches that don't use the substrate trick, such as the LTC1043. Notice the single peak in the 1043's Ron-vs-Vin plots. Perhaps using one of these will make you happy.

--
 Thanks,
    - Win

Hello Fred,

Win has explained it quite clear. The switch I used often was the SD5400 but since this is just a quad of single FETs it requires hooking up another quarter of it "in reverse" to counter the charge injection with one of opposite level.

For really low injection I have used diode arrays driven by tiny toroid coupling transformers. I didn't do the math for your case but one app was the sampling of a CCD array. Sampling duration was around 15nsec with the sample pulse having rise and fall times of a few nsec, intervals were around 70nsec and we had to read down to -60dB from full scale (half a volt or so) without even a whiff of charge injection. Lo and behold it worked right away, Ci was so low I couldn't even measure it. But the diodes have to be at least paired if you can't find a decent quad. IIRC I placed some foil between primary and secondary and grounded that to avoid any capacitive coupling. And yes, you'd have to make your own transformer. I found none of the SMT commercial ones to be suitable but didn't spend too much time since winding them was easy.

Regards, Joerg

Fairchild FSA66 is an interesting part. They claim 0.05pC charge injection. Don't know if that's real or a typo. Mouser carries this part. I'll be trying this part out in a month or so.

--
Mark

"qrk" a écrit dans le message de news: snipped-for-privacy@4ax.com...

input

(Gohm)

sure,

Thanks Mark. Don't know if it's a typo either but I've ordered samples, so we'll know soon. The 0-5V supply will not make my life easier, but I can make an effort if it's spot on on all the other characteristics.

--
Thanks,
Fred.

"Joerg" a écrit dans le message de news:qtlRf.43317$ snipped-for-privacy@newssvr12.news.prodigy.com...

Unfortunately I don't need short sampling time, but short _blocking_ time, and almost DC response otherwise, so a transformer driving isn't possible. Two balanced current isn't possible either due to the node high Z (1G) and sensitivity to current noise (which triggered the 1G biasing impedance).

Plus I'm dubious about the bridge V drop stability down to 10-20nV (that's only 10^-5K temperature matching across the bridge :-) under the sampling transients.

I tried the easy path, but I think I won't avoid the SD5000.

--
Thanks,
Fred.

That's an interesting trick.

--
 Thanks,
    - Win

Fred, did you read my detailed posting? I imagine the FSA66 will have the same problem, but they don't show an Ron-vs-Vsig plot so we can't predict in advance. Remember I had suggested an LTC1043, you should try that part and report back to us. :-)

--
 Thanks,
    - Win

Commonly done for you in "better" switches, like the ones I design into my chips ;-)

(Dummy switches with the opposite phase drive.)

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

"Fred Bartoli" wrote in message news:44170097$0$26750$ snipped-for-privacy@news.free.fr...

Have you looked at the Peregrine Semi quad FETs? I've not used them, but I believe they might be interesting for this sort of application.

Regards Ian

Hello Fred,

The other way around would be fine but in your case the transformer thing probably ain't the thing to do.

Tough, even with a quad.

But be prepared for sticker shock ;-)

Regards, Joerg

arrangement.

Thanks Win. Now that you've refreshed my memory, I remember having read that story about the 4016/4066 many many moons ago, but where was it?... One thing I didn't catch then, apart from the Ron benefits, is the consequences of that body switching. And I probably skimmed through this AoE passage a bit too fast, too :-( But now the Ron curve shape won't go unnoticed any more :-))

Thanks for reminding me the LTC1043. I've wrongly classified it along those (to me) desperating low Qinj switches, discarded it as its single supply isn't best suited for my needs and then simply forgot it. I've now some on order for test, but the RDSon is a bit high to my taste: with about 100R RDSon I'll already need about 10000 averages to bring the signal reasonably accurately out of noise, which I had hard time to make the test bench guys swallow. With about 130R Ron at the Q sweet spot the 1043 is quite close, but depending on the signal feed through I may have to have 2 switches in series(with a 100/220p bypass cap in between). But that'll make for a 25000 averaging. Maybe I can parallel 2 switches. But the SD5000 at 30R @ 10V totalizing 60R is much more appealing. I'll check them both.

Thanks again.

--
Thanks,
Fred.

arrangement.

Yes Win, I've read it and began replying when interrupted. Thanks. I now well understand all this but the rising RDSon figures gave me a slight hope, so I did, just in case, with other parts. OTOH the specific measurement conditions may hide a lot of thing but they also have a range of NMOS only bus switches so I just considered the case open with this part. Probably 1 chance out of 1000 to be lucky.

I've also the LTC1043 on order, but the RDSon is a bit high to my taste and the SD5000 is better in this respect. (see details in the other reply).

--
Thanks,
Fred.

Hello Fred,

Since you mentioned that techs do the assembly, one word of caution: The SD5000 or in my case SD5400 is the most ESD-sensitive device I have ever met. The tech blew them on 1st, 2nd and 3rd attempt. After the 3rd he became quite mad and was absolutely certain my circuit was wrong and blowing the devices. So I made sure he grounded the circuit board, himself, the iron, the mat and left the feet off the linoleum while handling the chips. Bingo, worked every single time.

Regards, Joerg

"Joerg" a écrit dans le message de news:HZGRf.1010$ snipped-for-privacy@newssvr27.news.prodigy.net...

Sure, but I'm not Win (yet :-) ) and have no tech. So as I'll know who to blame, I'll try to do it well first time.

--
Thanks,
Fred.

"Fred Bartoli" a écrit dans le message de news:441738f7$0$26762$ snipped-for-privacy@news.free.fr...

See:

samples,

slight

and

I've received the LT1043 and also the latest AD low Q parts (ADG121x) which AD recommended after some interesting exchange. I must say I tried them, but without much hope. And indeed... they work amazingly well. Absolutely nothing common with the ADG44x.

The high impedance test circuit was, as before with the ADG444:

D _/ S |\\ .--o/ o--+--+-----+---------|+\\ | | | | | >-+------ '---------' | | .-|-/ | .-. | | |/ | 100M | | --- 1nF '------' | | --- '-' | | | === === GND GND

For the part I tested, the net injected charge is 0.12fC after a full ON/OFF/ON cycle. This represents a negligeable 12pV on my 10uF input cap. I guess I'll be satisfied with that :-)

The hold step in the real circuit conditions :

.------. 10u | |\\ | '-|-\\ | || _/ | >-+----->

.--||--o/ o---+----+-----------|+/ | || | | |/ | --- .-. | 1n --- | |1G | | | | | | '-' | | | === === === GND GND GND

is also easily trimmed to under 1uV.

The only slight minor reservation is that at 120R the RDSon is twice my target, but I can parallel 2 of them.

When AD asked me to try these parts I asked them what could make these 121x different from the 44x but it seems they didn't want to answer. Now I know they work, I'll ask them again and report here if I have some interesting answer.

For the LTC1043, I promised you to try them and report. I'll do this later, because they are less than ideal for me and I have not much time right now.

--
Thanks,
Fred.

Which part did you try, exactly?

Twice the charge-injection step?

They must be finally doing the right thing with the old substrate trick, a proper break before make, I assume.

OK, we'll look forward to that.

--
 Thanks,
    - Win

ADG1211.

Not a pb here: this is used to mask a transient. And this will be trimmed. The really important one is the 4x12pV per step (I'll need 2 switches in series) which is totaly negligible.

I doubt that's enough. They have to fight to give 0.5pC charge on one output. 0.15fC is 300 times better. If the substrate was switched to one of the switch side, this would translate to probably unattainable matching. My guess is for something like substrate switched, but to a buffering push-pull follower or the like.

--
Thanks,
Fred.