Truth Table for Any Logic

Sounds like another homework question. My first thought was *analog solution*:

My first thought was a CPLD/ROM or an MCU, but then again, I'm getting lazy like that.

Do you mean exactly 5 high? What does "output 5" mean?

That said, I don't know of a static truth table convention other than

1, 0, X (don't care for inputs) and Z (tristate outputs).

K maps are seldom useful. I've never used one, as I recall. Classic logic minimization is not often called for these days.

John

Nowadays they are built in to many tools, but that doesn't mean something somewhere is minimizing the logic. I'm not sure I understand. Are you saying that it's not needed at all or just that it need not be performed manually anymore?

It's not clear what the OP wants but is sounds like some kind of decoder. I would suggest either find something that already works or if you need to develop this on your own you should look into quine-mckluskey because it sounds like you may be trying to minimize multiple outputs.

I strongly suggest that the op provide more info if you want real help.

If you're designing in a cpld or an fpga, it's best to express the logic for maximum clarity of function, and let the software minimize it. Once it's minimized, it may mot be easily recognizable any more. LUTs are a lot different from AND gates.

Discrete glue-logic type design is usually fairly simple, and uses available gate types, and may need speed minimization, so isn't well suited to K-map minimization. Usually this sort of design is done by inspection and juggling.

2^10 is a big decoder.

John

--- If I understand you correctly, what you're looking for is: (for the 2 out of three input case)

y = (a.b)+(a.c)+(b.c)

and the truth table would look like this:

A B C Y

-------+---- 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1

The start of your 10 input truth table would look like this:

A B C D E F G H I J Y

---------------------+--- 0 0 0 0 0 0 0 0 0 0 0

and then, 1022 entries later, would look like this:

A B C D E F G H I J Y

---------------------+--- 1 1 1 1 1 1 1 1 1 1 1

Quite an ungainly beast to fill in, yes?

Another way to write it (using the 2 out of 3 input case) would be like this:

A B C Y

---------+----

0 0 0 0 0 0 1 0 0 1 0 0 X 1 1 1 1 0 0 0 1 X 1 1 1 1 0 1

The Xs represent "don't cares" where either a one or a zero will result in a proper output, and there are some savings to be had in the number of entries doing it this way, but I still wouldn't want to have to generate the 10 input case by hand.

JF

This is similar to 'majority logic'; a typical implementation is done in analog summing of current sources switched by the logic inputs... you thus are using the information that all the inputs have identical weight. If you want to count the inputs, you can use adders to do it, of course.

The truth table, general though it is, hides the simplifying principle rather than illuminating it.

We're on the same page. I thougt you might be saying something different and i was curious.

Yeah, looks like nano tech got here just in time :)

Actually it sounds almost like he may want something like an m of n decoder. I googled that and hit a patent as the first hit :O

Thanks for the reply. Have an assignment to make a digital bowling pin counter. Have the circuit working. Not sure how to express the logic for the assignment. For example, a 3 can be pins 1,3,5 or

2,3,5. It really does not seem like this lends itself to a truth table. I will keep looking. Most of the truth tables we covered were conventional and simple.

If you have to have a truth table, a table of 2^10 (1024) entries would cover all possible combinations of 10 pins. In algorithmic form, a 10- step FOR loop and a counter to accumulate the total would be quicker to type, and that's probably how your hardware works.

I'd say this is not a truth table problem but a counting problem. Generate 10 sequentially adressed lines (say a 10 pulse generator into a 10 stage shift register) and AND them with each pin state. OR the 10 anded lines. Now you have generated n pulses equal to the number TRUE pin states. Now count the pulses. OK? This is a problem where analog is mcuh simpler.

Good luck

--
Analog???

JF

Do you really want any 5 from 10 or do you want a more manageable any

3 from 5?

Any 5 from 10 can be fairly "simply" done using 252 five input AND gates and one 252 input OR gate.

If you want exactly 5 from 10 then you need 252 ten input AND gates,

1260 NOT gates and one 252 input OR gate.

3 from 5 is more manageable in practice needing 10 three input AND gates and one 10 input OR gate. Make that 10 five input AND gates, 20 NOT gates and one 10 input OR gate for exactly 3 from 5.

In general for M from N you'll need X M input AND gates and one X input OR gate or X N input AND gates, X*(N-M) NOT gates and one X input OR gate

where N! X= -------- (N-M)!N!

Of course, you can express those AND gates as combinations of two input AND gates and those OR gates as combinations of two input OR gates and then optimize. (I'd recommend writing or finding a program to do this!)

Tim.

Should be:

N! X= -------- (N-M)!M!

Tim.

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Thank you everyone for the help. The assignment requires kmaps and truth table. With my design, they did not seem reasonable. Just wanted to be sure there wasn't another way of expressing any logic.