From truth table to logic circuits

Nov 18, 2005 2 Replies

The textbook way for small numbers of inputs (3 or 4 certainly, 5 or 6 with some sweat) is Karnaugh maps. Looking back I'm not really sure what they teach or if they really help you any in getting a good implementation.

Even in the 70's the time-efficient way to do this for more than a few inputs was with data selectors, see Lancaster's _TTL Cookbook_.

If you're working in FPGA's/GAL's/etc. there are very good computer tools that essentially just let you put in the truth table and it implements it in an appropriate way for the technology.

If there are race conditions in decoding (glitches not allowed) things get more complicated (but many of the automatic tools will handle this for you too.)

Tim.

Can you be clearer as to what the difficulty is with 3 or more inputs? Are you have difficulty implementing with AND / OR logic or are you trying to minimize hardware. It seems to me the truth table inherently defines the logic required - thats the main reason for making the truth table in the first place.

Dan

-- Dan Hollands

1120 S Creek Dr Webster NY 14580

Given a truth table, is there a procedure to follow in order to draw the logic circuit? For two inputs, it is easy to guess but it gets difficult when at least three inputs are involved.


Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required