I have a 555 timer in monostable mode. I output a 45 second pulse. No problem doing this. What I want to do though is to delay triggering this pulse while another signal is high (12V) - what control do I use to do this?
So: while input signal is 12v the output must stay high. When the input signal goes low then I want the one-shot to trigger maintaining the output (still) high for 45 seconds and then go low.
Can anyone help?
Thanks.
If I understand you correctly, You want a low transition or just a low signal to start a One shot timer however, you don't want any other transitions (resets) to effect the timer until it has expired it's
45 second count? this is called a gate.You have a couple of options here. use an OR gate where as the 555 timer out goes to one input and your Reset Line(trigger) is the other input. the OR gate output would then control the RESET line for example. with this, when the 555 output is high, it will hold the GATE's output on, this is because it's an OR gate, one or the other needs to be on for the output to be on. This also means, a low on the other input will not be seen at the RESET pin.
If you want to cut corners. place a NPN transistor in there instead.
Emitter to the 555 timer out, collector to the RESET Pin. use a pull up resistor on the RESET line. and use a bias resistor on the base. you don't need much current. the difference here is, you'll now need s + level to reset it instead of a - level because you'll be biasing the NPN. when 555 output goes high. there will be now path to pull the RESET pin to low once the timer starts.
I guess it's a matter of choice.
Btw, if you have multiple points of triggers, you can isolate them via diodes with either method. only the RESET pin directly will override.
-- "I\'m never wrong, once i thought i was, but was mistaken" Real Programmers Do things like this. http://webpages.charter.net/jamie_5
Jamie wrote in news:wV1Ei.56$ snipped-for-privacy@newsfe03.lga:
Sorry, that's not quite what I meant - I'll try to explain it better. Under normal circumstances the circuit outputs a pulse of 45 seconds as soon as it is energized (in a one shot configuration) However there is this other line that goes between o and 12 volts. Anytime this signal goes to 12 volts I want the whole process to freeze and only start the 45 second pulse after that signal goes from 12 back to
0 volts. In other words if the signal goes high (no matter if the 555 output is already high)I want the output to go low 45 seconds AFTER the 12volts go back to 0. I think there may be a pin on the 555 that will do this I just don't know which one will do it. Or maybe I need an external gate.Thanks for your help.
What you want is a "retriggerable oneshot",google gives as first result
Sjouke Burry wrote in news:46e0d2cf$0$25496$ snipped-for-privacy@text.nova.planet.nl:
I think this will put me on the right track - it is a retriggerable oneshot I'm after - I did not know what it was called - having a name for it will help me with my search and also the fact that you say that I need extra components other than the timer.
Thank you for your help!
Is that 12V-to-0V transition the _only_ thing that's clocking your one-shot, or is it merely an inhibit and there's a different signal triggering the one-shot?
Incidentally, it might be a convenient time for you to learn about timing diagrams. :-)
Cheers! Rich
By combining your posts, I understand it as this: You want a (+) output as long as the input is (+) and it must stay (+) for 45 seconds after the input drops. There must be no gap, no matter how small, in the (+) output when the input signal drops. You might be able to get away with oring the 555 output with the input, but the brief transition time of the 555 from non-triggered to triggered when the input drops could create a gap.
My suggestion is that you add 3 transistors and support components to the 45 second 555, like this:
PNP +12 ---------------------+----------------- ----+ | e\\ /c | | --- Q2 | | | | [10K] [1K] | | | | +-------------------+ +---> Out | | | /c |c | +----+-------+---| NPN / | | | | \\e Q1 +------| NPN | [.1uF] [100K] [D1] | | \\e Q3 | | | |a | [3.3K] | [1K] | | | | | | | | | Input-+---- | --[555]--+ | | | | | | | Gnd --+----+-------------+-------------------+------+
(+) on the input will turn Q1 on through D1. That will turn Q2 on, so you get a (+) out. When the input goes (-), the .1 uF in parallel with the 100K will hold the base of Q1 (+) briefly, keeping Q1 (and therefore Q2) on while the 555 triggers. That way, there will be no dropout of the (+) output during transition. D1 prevents the (+) on the base of Q1 from interfereing with the (-) trigger on the 555, so the 555 will trigger when the input goes (-). The 555 output goes (+), which turns Q3 on. Q3 turns Q2 on, so the output stays (+). When the 555 times out 45 seconds later, Q3 (and therefore Q2) turns off, and the output goes (-).
Ed
Rich Grise wrote in news: snipped-for-privacy@example.net:
I did not include a timing diagram because the ascii drawings look all jumbled in my reader (Xnews) the only way I can see them is by emailing the posting to myself - I can't however, reverse that process (write the email and then post, it doesn't work). Thank you for your input.
ehsjr wrote in news:EukEi.16$qV3.10@trndny02:
Yes, thank you, this seems like it will work. Like another poster suggested... what I need if a retriggerable monostable cct. Your cct here seems pretty close to what I wanna do. Thank you.
Rich Grise wrote in news: snipped-for-privacy@example.net:
The 45sec one shot triggers as soon as power is applied to the chip.The output goes high right away. But it will stay on as long as the other signal is 12volts after this signal goes to 0 then the output goes low 45 seconds later. Everytime the control signal goes hi it keeps the output hi until 45 seconds after the signal goes back to 0v.
Jamie wrote in news:iRhEi.21$ snipped-for-privacy@newsfe02.lga:
I'm getting a lot of good ideas from you guys - thank you very much.
"and" the 2 inputs, you'll have to get levels compatible if using ttl
---
View in Courier:
+12V>----------------+------+---------+--------+ |R1 | | |R4 [10M] | | [3K3] | | | | Q1 | | +---|--[1M]--+ 2N3904 | |R2 | | R3 | C----+ [10K]--[10K]---B | | | >------+-->VOUT E +------|--------|-/ U1A | |+ | | LM393 | [4.7µF] | | | |C1 | | GND>------------+----+------+---------+----------->GNDWith no +12V, C1 will be discharged and 0V will appear on U1A-.
Then, when power comes up, U1A+ will go more positive than U1A-, causing VOUT to rise to +12V and stay there until C1 charges to a voltage higher than that on U1A+. At that time VOUT will fall to about 0.4V worst case.
Any time VIN goes high it will turn on Q1, which will discharge C1 quickly, making the voltage on U1A- more negative than the voltage on U1A+, forcing VOUT high until VIN goes low and allows C1 to charge up again.
R2 should be set somewhere in the vicinity of 8V for a 45 second timeout and it would be a good idea to use a polyester (Mylar) cap for C1 in order to get low leakage and a reasonable tempco. If you want to/have to use an aluminum electrolytic, observe polarity.
Also, connect all of the unused pins of the second comparator to ground.
-- JF
-- Slow day... Version 4 SHEET 1 880 680 WIRE 0 96 -416 96 WIRE 128 96 0 96 WIRE 320 96 128 96 WIRE 448 96 320 96 WIRE 0 128 0 96 WIRE 128 128 128 96 WIRE 448 128 448 96 WIRE 320 224 320 96 WIRE 0 240 0 208 WIRE 288 240 0 240 WIRE 0 256 0 240 WIRE 0 256 -96 256 WIRE 448 256 448 208 WIRE 448 256 352 256 WIRE 128 272 128 208 WIRE 240 272 128 272 WIRE 288 272 240 272 WIRE -272 304 -320 304 WIRE -160 304 -192 304 WIRE 0 304 0 256 WIRE 128 304 128 272 WIRE 320 320 320 288 WIRE -416 336 -416 96 WIRE -320 336 -320 304 WIRE 240 384 240 272 WIRE 288 384 240 384 WIRE 448 384 448 256 WIRE 448 384 368 384 WIRE -416 448 -416 416 WIRE -320 448 -320 416 WIRE -320 448 -416 448 WIRE -96 448 -96 352 WIRE -96 448 -320 448 WIRE 0 448 0 368 WIRE 0 448 -96 448 WIRE 128 448 128 384 WIRE 128 448 0 448 WIRE -416 496 -416 448 FLAG 320 320 0 FLAG -416 496 0 SYMBOL Comparators\\\\LT1017 320 256 R0 SYMATTR InstName U1 SYMBOL res 384 368 R90 WINDOW 0 66 54 VBottom 0 WINDOW 3 72 58 VTop 0 SYMATTR InstName R1 SYMATTR Value 1e6 SYMBOL res 432 112 R0 WINDOW 0 48 44 Left 0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL res 112 112 R0 WINDOW 0 38 42 Left 0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL res 112 288 R0 SYMATTR InstName R4 SYMATTR Value 20k SYMBOL res -16 112 R0 WINDOW 0 45 40 Left 0 SYMATTR InstName R5 SYMATTR Value 10e6 SYMBOL cap -16 304 R0 SYMATTR InstName C1 SYMATTR Value 4.7e-6 SYMBOL voltage -416 320 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 12 1 1e-6 1e-6) SYMBOL npn -160 256 R0 WINDOW 0 62 20 Left 0 WINDOW 3 30 47 Left 0 SYMATTR InstName Q1 SYMATTR Value 2N3904 SYMBOL voltage -320 320 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(0 12 60 1e-6 1e-6 10) SYMBOL res -176 288 R90 WINDOW 0 -39 56 VBottom 0 WINDOW 3 -38 62 VTop 0 SYMATTR InstName R6 SYMATTR Value 10k TEXT -392 472 Left 0 !.tran 240
John Fields wrote in news: snipped-for-privacy@4ax.com:
Thank you John.
Just the inputs. Leave the output floating.
Cheers! Rich
--- Interesting...
Their 1989 General Purpose Linear Devices databook, 5-65 states: "All pins of any unused comparators should be grounded", while page
8 of the datasheet at:states: "All input pins of any unused comparators should be tied to the negative supply."
-- JF
I will grant you that grounding an open-collector output would do no harm, but I wonder if it's really beneficial, i.e., would it make any actual difference in the operation overall?
Thanks, Rich
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