Counting 1-6 instead of 0-9 with a 74LS192 / 74LS47

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Actually, I commend him for simulating it first since he found an
error of mine that way _without_ building it and then having to
rewire it to fix it.  Pretty smart move, I\'d say.
Reply to
John Fields
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The reason for that is because due to moving, my breadboard and all my electronic equipment are packed in boxes. At this stage, I haven't actually built anything, I'm just harvesting ideas and possible brainstorming.

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Sincerely,                      |                http://bos.hack.org/cv/
Rikard Bosnjakovic              |         Code chef - will cook for food
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Reply to
Rikard Bosnjakovic

a voltage controlled oscilator one that changes frequency depending on some input voltage..

something like what you want can be fashioned from a 555 like so.

Clock source for electronic dice. r2 r1 | 4.5-16v DC +-[5K6]-+--[10K]----+ | | | | +-+ +-[100k]--+ | | | r5 | r4 | | +-+---------(-[10K]-+ | | | | | | | | +-------+-+ | | | o | | | | | |-| | | . . . | . . . | | | o | | . vcc . | | | | +--r out----+---- out. |10|| | | . . +--||-(-+-+--tr . | || | | . 555 . | c1 | +--th di-- | | . . | +--+---cv . | | . gnd . | | . . . | . . . | | | | | ||22 | |-[100k]-+---||---+ | r3 ||c2 | | | +-----------------+ | 0v it won't give nice even pulses (but you don't need even pulses to drive a counter) it will a give gradual slowing of the pulses (from near 10Hz) as C2 discharges through r3 and when it eventually goes below about 1/10 of the supply (a few seconds) it'll stop entirely. increasing c2 will make it the ramp-down longer. increasing c1 (or r4) will make it run slower all. r1 and r2 control the charging time for C2 reducing them will make it ramp up to full speed faster when the button is pressed.

(try to keep the aproximate 2:1 r1:r2 ratio) r4:r5 determines the fraction of the voltage where the clock stops about 1:10 is a good starting point. more eg 1:5 would make makes the stopping more sudden, 1:20 would make it more gradual...

Bye. Jasen

Reply to
Jasen Betts

Why don't you use vintage technology and make the dice with a 555 timer connected to a 4017 decade counter, 6 mpsa42 transistors and a Nixie tube. Now you can count from 1-6 real easy and connect output 7 to the reset pin.... BY the way, I am partial to nixie tubes..

Regards, Sal Brisindi

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Reply to
Sal Brisindi

Jasen,

Old and oldfashioned but great fun. Although I have to admit I don't see how to connect that bistables to achieve a fair 1:6 chance for every throw. Ever had the idea to go and collect dice circuits. Guess I'd need a big, big harddrive for it. FAIK the latest dice can be made by a small micro, the PIC12F629 or a similar tiny AVR.

petrus bitbyter

Reply to
petrus bitbyter

I was about to suggest doing it all in transistors, and having a 7-dot output like a real dice. 2 3 4 1 4 3 2

I had a working circuit that'd run off 2.4V

basically a 2 transistor astable for the clock source driving

4 cascaded bistables.

Bye. Jasen

Reply to
Jasen Betts

Bistable one was wired to change state with every clock pulse it drove the dot "1" with its Q output and was wired with its ~Q output to the set input of of the second bistable, and a high-pass filters to the set inputs of the other two bistables. The second bistable drove the dots labeled "2" and "3" with with its Q output and it's ~Q output was wired to the reset input of the third bistable via a low pass filter. the third bistable drove the dots "4" and "5" with its Q output and like the second bistable it's ~Q output was wired to the reset input of tjh next bistablee, the fourth. the fourth bistable drove the dots with it's Q output and also with its Q output drove the reset input of the second astable but via a resistor so that it wouldn't reset while it's set input was high. this was how it worked 2 6 4

1 5 7 3

start

bistable 1 set this lights dot 1 all the others reset, no other dota alight display shows "1" clock pulse.

bistable one switches, dot 1 goes out, bistable 2 gets set signal so dots "2" light, bistable 3 and 4 also get brief set pulses but as their reset inputs are activated via low pass filters from bistable 2 and 3 respectively the don't change state (they may glitch a little but it doesn't show). so the dots "2" and "3" are lit - the display reads "2" clock pulse,

bistable one switches, dot 1 lights, set input to bistable 2 goes low (no effect) negative pulses on the set inputs of bistabl 3 and 4 (no effct)

so the so dots "1","2" and "3" are lit - the display reads "3" clock pulse.

bistable one switches, dot 1 goes out, bistable 2 gets set signal (it's already set) no effect bistable 3 gets the set pulse as bistable two is already set there's no reset signal present so it changes state, dot's "4" and "5" light. bistable 4 gets the set pulse but is reset via the low pass filter from bistable 2 (so no change) so the so dots 2,3,4,5 are lit - the display reads "4" clock pulse.

bistable one switches, dot 1 lights, set input to bistable 2 goes low (no effect) negative pulses on the set inputs of bistabl 3 and 4 (no effct)

so the so dots 1,2,3,4,5 are lit - the display reads "5" clock pulse.

bistable one switches, dot 1 goes out, bistable 2 gets set signal (it's already set) no effect bistable 3 gets the set pulse (it's already set) no effect bistable 4 gets the set pulse as bistable 3 is already set there's no reset signal present so it changes state, dot's "6" and "7" light. bistable 2 gets the weak reset signal but as there's a set signal present doesn't reset so the so dots 2,3,4,5,6,7 are lit - the display reads "4" clock pulse.

bistable one switches, dot 1 lights, the set input to bistable 2 goes low the reset input (from bistable 4s output) resets bistable 2 now that the set input is low bistable 2 changes state. dots 2 and 3 go out, bistable 2's ~Q output goes high, the high on bistable 2's ~Q output passes through the low pass filter and resets bistable 3, bistable 3 changes state. dots 4 and 5 go out, bistable 3's ~Q output goes high, the high on bistable 3's ~Q output passes through the low pass filter and resets bistable 4, bistable 3 changes state. dots 6 and 7 go out, the reset signal to bistable 2 turns off.

so dot 1 is lit, and the display reads "1" again. this is the state I started with. I'm not sure of the exact details of the conection to bistable 2's reset input. there may have also been a primitive diode-resistor "and" gate combining bistable 4's Q output and bistable 1's ~Q output instad of the resistor I describe above...

Bye. Jasen

Reply to
Jasen Betts

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