Hi friends,
I'm studying channel length modulation (CLM) in MOSFET. Simply speaking, when a n-channel transistor is in saturation region and Vds is increased with fixed Vgs, Id increases linearly due to CLM. This is because the depletion region depth of the reverse-bias diode across the drain and the substrate gets larger and larger with increasing Vds, causing shorter effective length.
My question is: As the effective length of transistor decreases, would it introduce velocity saturation which decreases Id and in turn makes Id constant with increasing Vds??
Hope it arouses your interest ~
Will