Aren't both kinds unstable if connected to a capacitor?
Imagine a SOT23-6 with pins...
V+ V- R+ R- Z+ Z-
When you connect a resistor between R+ and R-, the chip presents -R at the "Z" terminals.
We met with some LTC people last week. I suggested a couple of ICs I'd like to see... not including this one. They politely agreed, but told me that the reality of designing a linear IC isn't the presence of a good idea, it's having a launch customer who will buy a few million of them.
John