You probably should debounce that switch to derive one active clock edge per push.
Build the following circuit with a 1N914 diode (or equivalent), a 100k resistor, and a 100 nF cap. Connec TrueBriefly to the SET or RESET input of each FF, as dictated by your requirement.
One way is to use an RC lowpass filter to take out most of the bounce trash, and follow it with a device having input hysteresis to preclude any multiple transitions should the LPF output cross a single stationary threshold more than once per push or release of the switch.
Another way is to use a form C switch and hook the NO and NC signals to the SET and RESET inputs of a flip-flop whose output is bounce free.
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--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
The R-C will result in a brief (about 0.1 ms.) high pulse at the SET pin, which will result in the 4013 coming up with Q = 1.
You've got a bit of a problem, though, with the clock input, at least the way you describe it. You're trying to create a toggle, or "T" F-F out of a D F-F. That means there can be one and only one clock transistion each time you press the button. CMOS inputs can be seen as very small (pF range) capacitive loads. Because of leakage current on your perfboard or imperfections in the chip, your input seems to want to float high. When you press the button, you're discharging that small capacitor, leading to what seems to be a good single logic transistion.
That's not a good idea for a couple of reasons. CMOS inputs aren't like TTL inputs, where they just naturally go to onoe logic state. And also, it's very bad practice to allow slow transistions on clock signals unless they're going into a schmitt trigger or something else that will shape them up. Strange things happen inside clocked logic ICs when the clock transition is pokey, and none of them are good. Possibly you're the beneficiary of beginners' luck.
Anyway, the other half of the 4013 can help you with your issue here. If you've got a SPDT pushbutton, you could try this with the other half of the IC (view in fixed font or M$ Notepad):
(Note that we're're following one of the primary rules of CMOS, which is to never leave any input floating. Even if it isn't doing anything, the intermediate logic level at the input almost always dramatically increases power dissipation.)
The SPDT pushbutton is normally asserting the RESET input high. When you press the button, it will let go of RESET before it asserts SET, and you won't have to worry about pushbutton bounce causing multiple clock transistions. When you let go of the pushbutton, SET will be let go, but the Q output will remain high until the first contact of the switch with the RESET input. This is called debouncing. One and only one logic transition.
So, your whole one IC debounced toggle flip-flop should look something like this:
You can put your R-C pulse at the SET or RESET pin of the 2nd 1/2 of the 4013, depending on what you've got at the output, and whether you need it to power up ON or OFF. You will also have one and only one logic transition for every press of the pushbutton.
My switch actually *has* to be a momentary mini toggle, ie, the spring loaded ones that return to their original position. I'll go looking to make sure they make these in SPDT!!!
Thank you, I really do appreciate your help. I looked in my textbooks first.
I may need to add more momentary switches in parallel for remote operation. Well not remote, but think of a light switch on each side of a room. It still has to be momentary toggles.
Uh oh, I think it just got more complicated. I have to use the least amount of wires.
Anyway to have a debounce with just the momentary spst? If I have to use a remote box with cable conected to mulitple leds, the less wiring in cables the better. If I have to do 30 leds you can see what I mean. I
Here is a circuit which was once published in EDN, IIRC. It relies on positive feedback thru the series RC pair to effect a short duration threshold shift that suffices to avoid bounce effects for normal switch bounce.
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You can buy buffers with input hysteresis, so this approach makes the most sense when you just want one or two of these inputs and have leftover gates or PLD pins to use.
That is a disadvantage, alright. That's why I mentioned the LPF and hysteresis (aka "Schmidt trigger") approach. ....
Welcome.
--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
No problemo. Some of this probably wouldn't have been in your textbook, anyway. The R-C pulse and the use of the forcing S and R inputs instead of D and CLK usually aren't in beginners digital logic books. There are a lot of "tricks" that will help you that they might not teach in class.
For CMOS logic "tricks", try finding a copy of Don Lancaster's "CMOS COOKBOOK". If it's not at the library, you can get it from Amazon or Mr. Lancaster's website:
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It's a good source for a lot of these tricks, and still very relevant to a lot of what you'll do with digital logic. Well worth it. I particularly like his discussion of MML (Mickey Mouse Logic) in Chapter
It explains some of the limits of this stuff, which is easy to do with CMOS.
Other sources of tricks are Mr. Lancaster's magazine columns (many of which are available on his website, too), and manufacturer data sheets and app notes. Look particularly at old National Semiconductor, Fairchild, and RCA COS-MOS appnotes if you can find them.
Keep learning and having fun. It's not all in the textbooks.
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