Zener protection on mosfet gates

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The datasheet shows two back to back zeners to protect the mosfet gate. It also has ESD protection of 1kV+. How can it have 1kV+ ESD across the gate and V_GS of about 20V? Are the built in zeners just very weak and not meant to handle much current?

Reply to
JusyPusy
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1KV of ESD protection means that a human body, charged to 1KV, can touch the gate without damage. The zeners will limit the actual gate voltage. 1KV is fairly pitiful for an ESD rating, the lowest I've ever seen. I assume the zeners are in fact wimpy. We use the non-protected 2N7002s and they seem fine. 2N7002s seem to die at about 70 volts on the gate.

John

Reply to
John Larkin

I understand the HBM. What I do not understand is how well the built in zeners will protect the gates. The abs max V_GS in the DS is +-20V. You are saying 70V which I assume you got through testing. This doesn't mean much since you may have just testing a relatively good batch. Possibly though it could be those built in zeners helping out a little.

I'm curious if I need to add external zeners to the gates for possibly continuous overvoltages of a few volts above the DS. A 3c zener could potentially save a costly repair on the product. I'll probably add the zener anyways but I'm curious about those internal zeners and why they don't seem to do anything beyond ESD.

Reply to
JusyPusy

I couldn't have got 70 volts on the gate if the fet had zeners. I applied the voltage through a big resistor, and if there had been zeners, they would have protected the gate.

I've zapped a few mosfets on purpose, 2N7000 types and bigger ones, and 70 volts is fairly typical.

I'm guessing that they are very small. You could connect a current-limited power supply to a zenered fet and measure the actual breakdown voltage, and then increase the current to see when they fail.

We had a thread on this subject some weeks back. Someone who seems to know about this stuff said that the zeners eat a lot of silicon area, so are small, so are arguably not worth it.

What would the fet gates be exposed to in your application?

John

Reply to
John Larkin

How big of a resistor and about how long?

That's my guess too. Probably just very wimpy zeners.

The fet gates are connected to the rails through anywhere from 100k to

1M resistors. If the power voltage to larger for whatever reasons the gates can see that voltage. I have overcurrent protection so the goal is to save the fets until the fuse blows.
Reply to
JusyPusy

Its better not to put zeners at the gate at all. Just use a driver which can't swing the gate beyond the limits.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel

I think I used 1 meg or something. I cranked up the voltage slowly, by hand, until the fets failed. Negative on the gate, so I could ohm the drain to see when the gate punched through.

John

Reply to
John Larkin

Hi Mico,

If you woult take time to have a look at the datasheet, then you would have seen, that the FET is not a powerfet driven by a driver. Sometimes such FET are just in the front of a schematic contacting real world.

Marte

Reply to
Marte Schwarz

I *never* expose unprotected inputs to the outside world. And I try to protect outputs, like mosfet drains, whenever I can.

John

Reply to
John Larkin

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