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To get its on resistance down to a minimum, the gate should be much higher voltage than the source, probably 8 to 10V depending on the specs. If it's anything less than that, then you have a resistance in the FET that's dissipating excessive power. If this is a switching PS, then you may have problems with the FET staying too long in the linear region, between fully off or fully on. That's why the SMPSes often use a pair of complementary drivers to actively pull the gate on or off quickly.