Video grabber

Analog Devices has several chips that do the A/D conversion and synchronisation. These are intended for flat panels so they are pretty cheap as well.

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nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel
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That sound useful. Have you any links to the faster devices? >250MHz Thanks.

Reply to
Grumps

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250 MHz "pixel clock"? How does that compare to current refresh rates on televisions? Or fancy computer monitors? 140 MHz ADC (12 at a time?) speed is fastest on the Analog Devices page. How does that translate to refresh rate?

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ADV7403 12 140 10 NTSC; PAL; SECAM Composite; RGB; RGB SCART; Y/C; YPbPr 10 & 20-bit YCbCr 4:2:2; 12-bit RGB DDR; 24-bit YCbCr/RGB 4:4:4;

8 & 16-bit YCbCr 4:2:2 12 550 100-Lead LQFP $21.14

The refresh rate on video is nowhere near that high is it?

120 Hertz refresh is fast for video isn't it? Isn't 250 Megahertz overkill?

Are there video cards generating that fast of a signal? Are there displays capable of changing that fast?

I don't pretend to be proficient at this.

Are you?

1080p/120 =3D 1920x1080 at 120 Hz through a VGA connector?

Wouldn't such a signal be HDMI and not VGA?

2073600 pixels per frame The 140 MHz A/D does 12 bits at a time. (12 input channels?)

/12 =3D 172800 12 bit segments The A/D can convert a frame 810 times per second.. But you want it to go almost twice that?

Check my math..

What kind of source and display does 1620 frames per second?

I must have miscalculated somewhere because I can't believe that A/D would make these parts 800 times faster than needed for the fastest TV's...

Where did I go wrong?

Reply to
Greegor

It's much faster than HD TV (1080p etc).

There are several that run a 4Mpixel display at 60Hz.

It can be, yes.

Yes.

That depends on the number of pixels as well as the refresh.

Yes. Plenty can do over 400MHz.

It's not a refresh rate issue in this respect.

I'm getting there!

Don't restrict yourself to 1080p. There are monitors that are twice that resolution (and more).

Both. Customer has an installed base with mainly VGA.

Half of what I need.

It has an input mux. Only one (set of) ADC.

Don't / by 12. There's effectively only 1 ADC, not 12.

See above.

Reply to
Grumps

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Did I read the ADC specs wrong on that?

This is WAY beyond somebody's bad ass CAD/CAM system isn't it?

At that resolution is there a commercial frame grabber available?

If there is, aren't you in a rarified specialty market that makes it reasonable to just PAY THE MAN for the product?

Installed base, at that resolution?

Motion picture animation or what?

Reply to
Greegor

I guess it could be used in this application. It's not our target though.

Yes. Expensive. Even if we bought their technology, it's still too much.

Our customer has already asked existing manufacturers for a part-custom design. Then they came to us.

It's not, and I can't say what the primary app is. When we get it working, and our customer is satisfied, then we'll go for other markets (I can think of two more that would find this useful).

Reply to
Grumps

My monitor is burning 1600 * 1200 * 85Hz right now. That's right around

163.2MHz pixel clock, not counting refresh times (maybe 10% more). Monitors come even higher and faster, so a 250MHz clock is certainly concievable.

Incidentially, if it's an analog CRT, the video output needs a bandwidth at least half the pixel clock. The scary part is they're doing it into the CRT cathodes or grids, which require on the order of 100V full contrast. I don't think even Tektronix ever even attempted that much bandwidth at that voltage -- they manufactured special CRTs with higher deflection factors instead!

Tim

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Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

On a sunny day (Thu, 11 Feb 2010 10:17:04 -0600) it happened "Tim Williams" wrote in :

The issue of driving a wehnelt at that frequency to control beam current is very different from deflecting an electron beam with a given speed.

Reply to
Jan Panteltje

The capacitance might be slightly lower, but voltage is voltage. The voltage required for modern CRTs is comparable to the deflection voltages on old electrostatic CRTs (e.g. 5AQP1, et al.).

Looking at old datasheets, this TV tube:

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shows a requirement of 30 to 100Vp-p drive over all conditions, and an input capacitance of 5pF cathode or 6pF grid. It might be lower in modern CRTs.

This tube:

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shows typical conditions of about 10V/cm deflection sensitivity, requiring about 100Vp-p across the ~10cm screen, and maximum 6.3pF per 'vertical' deflection plate, so they're actually pretty close.

Since HV HF transistors were hard to come by, Tek built better tubes, with deflection sensitivity on the order of 1V/cm vertical. You can drive a load like that with little more than regular RF transistors. (Sure, the impedance is lower, but by constructing a lumped transmission line, the impedance is flatter, so it's not a big deal.)

I guess CRT transconductances never got beyond the microsiemens, so they still had to deal with big voltages, hence the HV HF transistors which are so convieniently cheap today.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

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to my

You can try 1st vision Inc. They sell vision frame grabber..

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Reply to
vtech9815

On a sunny day (Thu, 11 Feb 2010 12:53:14 -0600) it happened "Tim Williams" wrote in :

In the Tek scope CRTs there is not one set of deflection plates, but a number of those coupled with a delay line between each other. That makes it more like driving a transmission line.

Yes I now, exactly because of the construction I mentioned above.

Tek used resistors on ceramic substrate in the deflection circuits of the 100 MHz scopes. Power hugs. Modern CRT TVs (the late ones) used push pull stages to drive the CRT

For all I remember anyways, I had a 300 MHz East German CRT myself in my home build scope. BFY90.

Reply to
Jan Panteltje

To give a single data point, my monitor runs at:

(II) CHROME(0): Modeline "1920x1440"x0.0 297.00 1920 2064 2288 2640 1440 1441

1444 1500 -hsync +vsync (112.5 kHz)

Translation:

1920x1440 screen resolution (displayed pixels) 297.0MHz pixel clock Horizontal: 1920 pixels displayed 2064 pixels from hblank-end to hsync-start 2228 pixels from hblank-end to hsync-end 2640 pixels in total (including hsync and hblank) Vertical: 1440 lines displayed 1441 lines from vblank-end to vsync-start 1444 lines from vblank-end to vsync-end 1500 lines in total (including vsync and vblank) Negative hsync, Positive vsync 112.5 kHz horizontal frequency (line rate)

Calculating 112.5e3 / 1500 reveals that the vertical frequency (frame rate) is 75Hz, hence 2640 * 1500 * 75 = 297MHz pixel clock.

Reply to
Nobody

Use 2 devices with the second device using an inverted clock.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply to
Nico Coesel

Thanks. I'm evaluating that idea at the moment with a couple of NXP devices. Unfortunately these devices are now obsolete (they were triple ADCs at

270MHz). Next best is a set of 500MHz single 8-bit ADCs.
Reply to
Grumps

"Grumps"

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to my=20

screen.

line to line,

sampling

Hell, Jan, if you use a sampler and a modest ADC at least be smart about = it. Determine how many samples you can take in one line and do so every line = each frame=20 until you have completion. This way a 10 MSPS ADC can capture a stable = image in=20

16 or so vertical scans. Whankering around line by line may take 1000s = of frames. Or maybe you just did not express yourself well.

If real time (single frame) is required, interleave 5 or so more = reasonably priced=20 ADCs and their associated memory.

Reply to
JosephKK

Epihpan=20

then=20

In the interest of clarifying the ADC speeds do you really require a =

250MHz=20 dot clock? The red, green and blue signals are 8 bit? One thing i keep=20 bumping into is many fast converters lose ENOB at 1/2 of max sample rate = or less.
Reply to
JosephKK

1440 1441 1444 1500 -hsync +vsync (112.5 kHz)

That is a wonderful monitor. 2.7 megapixels or so.

Reply to
JosephKK

Where does the 270MHz requirement come from?

When you digitize you can lower the refreshrate of the VGA card considerably. Most LCD panels accept a 50Hz refreshrate. If you lower the pixel clock, the image quality will improve (less signal reflections and less smearing due to bandwidth limitations).

ST might have some interesting solutions as well:

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--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply to
Nico Coesel

ADI has a quad 250 MSPS converter:

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These are kind of expensive, but you should be able to put this together for about $400-$600 (FPGA, ADC, Clocking) and get someone to design it for you for 50-70K. That still leaves at least 70K profit for you.

Reply to
Frank Raffaeli

Did you think about taking this project in a whole new direction? I suppose your customer's hardware is a PC running software on a mainstream OS. You can use a (modified) tool like VNC to capture the screen and send it to another PC over the network. This way reduces the hardware cost to zero.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
Reply to
Nico Coesel

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