Hi all,
In I2C after the master has transmitted a byte of data , next is the Acknowledge cycle from the slave.In this cycle what shold the master drive on the SDA line, drive on it a '0' or a 'Z'.This confusion is there because the SDA line is externally pulled up.
Thanks in advance , Praveen
Praveen,
It's been a while since I've looked at this, so I could be wrong.
I don't think that it's an issue of who is the master. The side that's doing the reading will hold the SDA line low as its acknowledgment that it received the data, or not drive it (i.e., drive it as "Z") if there was a read error. Therefore, the side that's writing needs to not drive it (i.e., drive it as "Z") during the ack bit. The SDA line has a pullup so that it will float high if an ack is not presented to the line by the reader, and the writer will detect this as an error to its write.
Bob
The I2C spec specifies a data hold time of 5 "us" after the falling edge of SCL Now my question is when exactly should the slave acknowledge , should it wait for this hold time to ellapse before driving a '0'. or can it drive a '0' just after the falling edge of SCL to indicate the ACK pulse.
Thanks ~Prav
It's not confusing at all.
Your master ( it doesn't actually matter if it's a master ) is
*listening* for the ACK. Therefore it doesn't drive the SDA line - it goes Hi-Z.Remember, I2C is all about open drain / collector signalling on a single bidirectional bus. Not like SPI for example..
Graham
The receiver (either master or slave) can just drive it to 0 immediately. For a 400kHz device, waiting 5us would cause the sender to think the receiver was not acking.
If the slave can't ack that quickly, it can always inhibit the clock by pulling it low until it validates the data, then release the clock hold after it sets up the ack.
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