I have some circuits where I decided to put reverse biased 1N4148 or SD103 type diodes to the power rails at the output connector pin of a50ohm cable drive circuit composed of a pair of HC gates in series with a 27R resistor.
If the diodes are placed at the output (after the resistor from the gates' perspective) then they take the full brunt of any ESD surge applied to the output. Any constant voltage source greater than 5.7V or so would of course be shorted and potentially smoke the diodes.
But the main point is ESD not overvoltage protection. I understand the CMOS *input* diodes and FET characteristics fairly well, and have SPICEd these in considerable detail to come up with my favorite circuit for protecting inputs from typical ESD models while retaining most speed.
But the outputs are a different animal. I have no basis for knowing what surge currents and voltages the outputs can tolerate or enough about the FET characteristics to do meaningful modeling. Thus, my application of diodes is "seat of pants" design.
Do others bother with this or are outputs just considered not delicate enough to worry about?
What about when the power is off? There the diodes do come in handy for diverting current to the rails rather than through the device.
Thanks for comments.