UART Multiplexing

Apr 10, 2010 23 Replies

Fortunately these two are only on request which is why I have chosen to multiplex these two.

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Aren't we talking CMOS logic levels? Why not some kind of bus transceiver that can tri-state the undesired channel? ...Jim Thompson

| James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | The only thing bipartisan in this country is hypocrisy

In that case a 3.3 V single open collector chip with four 2 input OR gates that are 5 V tolerant should be sufficient. If the UART can be configured to use opposite polarity, an open collector-NAND chip would also suffice.

On a sunny day (Sun, 11 Apr 2010 17:35:40 -0500) it happened "eeboy" wrote in :

UARTperipheral of the micro is simply logic level

voltagelevels.

One or more 74HC4053

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