Fortunately these two are only on request which is why I have chosen to multiplex these two.
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Fortunately these two are only on request which is why I have chosen to multiplex these two.
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Aren't we talking CMOS logic levels? Why not some kind of bus transceiver that can tri-state the undesired channel? ...Jim Thompson
In that case a 3.3 V single open collector chip with four 2 input OR gates that are 5 V tolerant should be sufficient. If the UART can be configured to use opposite polarity, an open collector-NAND chip would also suffice.
On a sunny day (Sun, 11 Apr 2010 17:35:40 -0500) it happened "eeboy" wrote in :
UARTperipheral of the micro is simply logic level
voltagelevels.
One or more 74HC4053
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