Two FETs in one package

They're almost certainly separate dice, so it's whatever the package will take.

Cheers

Phil Hobbs

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That's a decent guess. I would also guess that those things use two separate dies on a leadframe that's split, so it should not be an important consideration compared to creepage distances of the package and footprint, but as always, if it's not on the datasheet, it doesn't really exist..

I'm almost certain I have seen dual fets that spec isolation

-Lasse

If they're "discrete" devices, they are on two separate metal "tabs", thus they'd be creep distance limited. ...Jim Thompson

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I love to cook with wine.     Sometimes I even put it in the food.

The dual FETs i have looked at had ZERO isolation as they had a common substrate..

Older dual jfets, intended for matching on a single dice, were spec'd for gate-to-gate voltage, as a process limitation.

If there are no inter-device (non-thermal) specifications, including capacitance, then it's realistic to employ devices as isolated within packaging process limitations.

Recommended pad clearances on power-pad duals (~SO8)can be as small as .01in.

RL

You might try one, crank up the voltage until it arcs over somewhere. I'd guess it would stand some number of kilovolts, something like a ZXMN6A25DN8 with two die and no power pad.

We have the same issue with smaller signal-type dual transistors, both concern for voltages and thermal resistance/thermal coupling.

I did 10 mil PCB fab "by hand" (film, KPR, etc) in the 80's.. Most fab shops accept 6 mils as "run of the mill" work (pun IS intended).

Have you been able to measure the thermal coupling resistance between the die? Also the thermal time constant? Without thinking,are there easy ways of measuring that?

Sure. Forward bias the drain-source diode in one section, which gets you a 2 mV/K thermometer, and dissipate some power in the other.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

I did some measurements on a UPA800 dual RF transistor. Here's a thermal image, with 80 milliwatts dissipated in one transistor.

The heated die is roughly 300 K/w to ambient. The theta between die is roughly half that. Using these as some sort of matched pair would be delusional.

In this case, I put a shot of heat (the big pulse) into one die and looked at the temperature (via Vbe) of the other.

You can see the Vbe go down, then back up, as the wave of heat passes through the 2nd transistor.

I haven't done any thermal experimenting with our dual SO8.

Bet it took all of 10mSec for you to think of that.. If i had stopped to think, it prolly would have taken me 300-500mSec.

Thanks! There was a case of a "Temp compensated" regulator where the time constant between the +T/C and the -T/C parts was in the region of 10 minutes - making your matched pair seem sane in retrospect.

"Vladimir Vassilevsky" schreef in bericht news:VKKdnbZIXb4Z8K snipped-for-privacy@giganews.com...

What types (typenrs.) are we talking about and where to get them? I recently looked for dual FETs but the only one I found was the BQF15 which was way too expenive for the simple repair I had in mind.

petrus bitbyter

There are lots and lots of them. Nice and handy, especially dual complimentary ones in small packages.

Consider these (prices in 3K from Digikey)

NTJD5121NT1G $0.058 ea. dual N-channel

2N7002DW $0.063 ea " DMG1016UDW-7 $0.080 ea N+P channel AO7801 $0.14 ea dual P channel 0.6A AO4842 $0.247 ea dual N channel 7.5A AO4807 $0.27 ea dual P channel 6A etc. etc.

Yeah, but stopping to think slows you down.

"Spehro Pefhany" schreef in bericht news: snipped-for-privacy@4ax.com...

Thanks a lot.

petrus bitbyter

Between covered, reflowed, power pad lands? Sure, you can make the board. Processing the assembly is another issue, particularly if you're looking for functional isolation in a power circuit.

This is just accepting the sweat on somebody elses brow - probably someone who's sweat is derated due to productivity screw-ups that are continually pushed out of the engineering dept.

RL

Without thinking?

RL