When they draw connection diagrams for power FETs or FET drivers in datasheets, they usually put 10 Ohm resistor in series with the gate.What is the rationale behind that? How did they come up with almost universal value of 10 Ohm?
I could understand slowing down edges for EMC reason, or limiting gate current, or dumping stray inductance to avoid oscillation on transitions. That depends on particular application. But why always 10 Ohms ?
Vladimir Vassilevsky DSP and Mixed Signal Consultant