This is a correct simulation result?

Hi All,

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Could you please advice, does this is a correct simulatino result?

PSPICE and LTSPICE both show this kind of result.

Best regards, Boki.

Reply to
Boki
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In so far as the results don't look too different from Figure 1 on page

4 of the data sheet, the simulations aren't obviously misleading.

They aren't realistic - a more comprehesive simulation would show the gate-source junction breaking down when the gate-source voltage exceeded 40V and the channel would vapourise fairly quickly with 20A running through it - but computer modelling is all about using over-simplified models to see roughly what is going on.

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Bill Sloman, Nijmegen
Reply to
bill.sloman

No, it's a good example of GIGO. Your model is WRONG. Don't blame spice when you use defective worse-than-useless models.

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 Thanks,
    - Win
Reply to
Winfield Hill

I wouldn't say that. Most real parts are even more wimpy than shown in figure 1, but basically the maximum current vs drain voltage is shrinking as it goes above 2A, as shown by the curve bending to the right. Even at high voltages the FET won't be able to conduct more than 4 - 5 amps. Compare that to the defective spice model, which shows the current gaily increasing to 22A and beyond, as if a simple Rds = 2.27 ohms was all that mattered. But as the datasheet shows in figure 2, Rds increases dramatically at high currents. They don't plot the curves very far, if they did the model's serious discrepancy would show more dramatically. That's one of the model's defects at high current. At low gate voltages the model isn't even in the same ballpark. It completely fails to model the threshold scene. All the detail we show for MOSFET behavior in AoE pages 121-123 is missed by the model. Anyway, as a result Boki gets GIGO.

I repeatedly say, vet your spice models with bench measurements.

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 Thanks,
    - Win
Reply to
Winfield Hill

"Boki" schrieb im Newsbeitrag news: snipped-for-privacy@v46g2000cwv.googlegroups.com...

Hello Boki,

To be honest, the simulation setup is nonsense! The MOSFET will not withstand a Vgs of 50V.

Try the following. .dc V2 0 10 0.01 V1 0 3 0.6

Garbage in -> garbage out.

Please read the datasheet before you setup a simulation.

Best regards, Helmut

Reply to
Helmut Sennewald

But that is the model provided by that company, what can we do more...

Best regards, Boki.

Reply to
Boki

The answer is simple. Don't rely on simulations. There's no substitute for

*understanding* how circuitry works. Learn some design theory !

Graham

Reply to
Pooh Bear

"Pooh Bear" a écrit dans le message de news: snipped-for-privacy@hotmail.com...

No. Don't blindly rely on crappy models. This case is trivial, but when doing serious analog design you have to check your models, know their limitations... and it's often that we have to make our own ones, carefully check them... This can be a non negligible part of the design time.

Can't agree more.

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Thanks,
Fred.
Reply to
Fred Bartoli

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