I'm using the LM3150, synchronous buck regulator, in a number of designs. Now it is sorted it works well.
Just been using it on a battery charger and at end of charge I set the voltage to zero. Gotcha. The bottom FET is left turned on and the fuse blows because it shorts out the battery.
I use FETs to protect against a reversed battery and to stop the battery discharging into the electronics when the charger is off so an easy fix.
Had me puzzled as to why the fuse blew though.
Some of these sync switchers can generate insane EMI spikes, too. Here's the output pin of an LM3102, demonstrating a textbook step-recovery-diode effect. This trashes opamps six inches away.
ftp://jjlarkin.lmi.net/SwitcherRise.JPG
Have I mentioned lately that substrate diodes suck?
John
I fitted a low capacitance schottky across the FET, TMBYV10-60. 150pF at Vr=0 and reverse leakage of 0.5mA. I had a snubber on the design but there was very little overshoot and no ring so I left it out for production.
I agree about substrate diodes.
I prefer the LTC3810. In pulse skip mode it can turn off the lower FET if a reverse inductor current is detected:
But it does turn on once in a while to replenish the bootstrap cap. I think if you'd pull it into UVLO upon a "charge complete" it turns off both drivers but I've never used that. Best to talk with LTC about the device if interested. Don't trust the simulator models as some of them might leave out a few functions, it's always better to ask.
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I've connected up the shutdown pin of the LM3150 but not used it. I'll see if it turns off the bottom FET.
The shutdown section in the datasheet doesn't say.
You might want to look into pulling the FB pin into an overvoltage condition, per datasheet (page 8) the LM3150 seems to then shut off both HG and LG.
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Weird.
I take the pin to 5V to give 0V out and the low FET gate was around
6V. I checked this because a potential divider pulls the output to about 5V when the battery is not connected and I was surprised when the output was 0V when I set it to 0V.The potential divider is not as odd as it sounds. It is a 47k from 24V turning on the protection FETs via the body diode to a 10k to ground on the output.
I'll recheck more closely tomorrow. Either I am wrong or the data sheet is.
The datasheet is ambiguous. It depends on what they mean by "off". Could mean "low" or also "not switching".
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Try increasing the turn On time of the top FET a little bit.
boB
It depends on your definition of "lately." With my impaired time-sense, I can only narrow it down with any confidence as sometime in the last coupla[SIC] weeks.
But, overall, yeah.
Got any ideas on my wire-bending gage-pin-as-a-mandrel post over on r.c.m?
Cheers! Rich
Yea..one opamp that Farichild (in the good old daze) was developing had latchup and/or oscillating properties in certain conditions. Checks for feedback from output to input, fixed expecially at low frequencies with symmetrical alignment of input pair (re-done as a crossed quad for more suppression) to output; which virtually eliminated thermal feedback. Still had problems. Finally found it at high tmp - latchup. Damn output transistor was injecting signal to the substrate, which acted as the base of a rather low gain lateral PNP..gain (i think) was in the region of 10^-5 which was too much and caused the major problems. Fixed with a new layout that wrapped an extra collector around the output structure, and then tying it to substrate - thereby making an extra lateral PNP that dumped the majority of the signal (ratio was over
1000:1). Laterals are a bitch.
It looks like the low FET state is left unchanged in the over voltage mode. If I power up in OV mode then the lower FET is off. If I enter OV mode when the unit is running I always find the lower FET on.
The Enable signal appears to work as expected leaving both FETs off.
It's not a choice I have. But the insane risetime is the result of the substrate diode behaving like an SRD, probably enhanced by the short forware bias time, Grehkov style.
John
LM35's are terrible, for modern parts, where designers should know better. The spec sheet says you can pull the output down to read temperatures below zero. Just don't apply the pulldown current before the main positive supply, or it will power up latched.
John
Why does the FETS used in the LM3150 PDF look like NON enhanced P-channels? Could this be a cause for a mix up?
Jamie
Oh, OK. I was just noticing that the LM3150 had external FETs and so the gates were accessable.
boB
That would be the California notation :-)
Just kidding ...
-- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
For what earthly use?
RL
Soorry. wrong number computed in early morning brain.
RL
Temps below 0C, not below 0K! I prefer the digital version, LM71, when I have port pins to talk to it, because it doesn't latch up. Or you can use the degrees-F version to measure a bit below zero C, without needing the pulldown below ground.
Bob Pease promised me he'd fix the LM35 latchup. Maybe 15 years ago.
John
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