Speaking of good H-bridge design practices...

A properly selected zener (400mW or less with a good slug construction), in combination with appropriate series limiters, will act to prevent down-stream driver circuit damage in the event of fet failure or other single fault abnormals. Without at least one series resistor to fuse 'open', the technique won't work reliably.

This is a repairability issue, which is not always a serious consideration nowadays.

RL

Could you possibly provide an example of a fault that D2 or D4 protects from? Or are you says that since Q4 and Q6's gates don't have series resistors back to the driver IC (IR4427), this circuit doesn't provide such protection?

It definitely wasn't taught where I went to school. I suppose it boils down to just thinking about what's going to blow up as you go through your various "power" components one by one, and then coming up with some scheme to prevent, e.g., cascade failure?

Right. In this circuit the zeners appear to have been inserted out of habit, rather than for an intended function. ESD protection is probably misplaced here, in amy event.

Gate drive voltage amplitude control is most economically achieved by addressing integrity of the driver's supply rail. Even here, different sections should be impedance-isolated and locally clamped to avoid telegraphing faults to the more sensitive areas.

Getting power train energy back into a control circuit supply rail is something you don't want to be faced with in the field, without capability of a complete FRU swap-out.

Techies may complain about gate resistors getting fried, but I don't think they appreciate the alternatives that are avoided by it's 'fusing'.

RL