Source Impedance

Hi,

What will be the source impedance of the following circuit with out load. The load is connected between points A and B

formatting link

Its a H bridge built by using four NMOSFETS ( FDL100N50F with RDS =

0.043ohm). Rds (on) will be in series with the load. I am not sure but I think that the Rds will be the source impedance.

I am trying to Calculate the Q of the system.

jess

Reply to
Jessica Shaw
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The H bridge is connected to a power supply = + 12V which can supply

2A. So, the load resistance = 6 ohm. XL = 62.8 ohm at frequency = 100KHz. Q = 62.8 / 6 = 10.47. Am I right? jess
Reply to
Jessica Shaw

The source impedance will be hard to calculate exactly, and will vary with conditions.

But assuming that your +12V rail is good and stiff (which you can make happen with bypass caps tight against your driver transistors) it's going to be pretty close to the impedance seen when the bridge is turned on hard in just one direction -- i.e., 2 * R_dson.

In real life that'll be the minimum source impedance. There's all sorts of things that will raise it. There will be short periods of time when all the FETs are off, and either no conduction is occurring or the conduction is through the FET body diodes; you have wires going to the load, your circuit traces have resistance, etc.

It's going to be way lower than the reactance of your coils, though, so it'll probably have a minor contribution to circuit Q.

--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
Reply to
Tim Wescott

Just because a pair of physical quantities associated with your amplifier divide out to a value in ohms, that does not mean that you have found the impedance.

The effective impedance of your amplifier (in normal electrical engineering usage) expresses the amount of current change for a differential change of voltage. I.e., if the thing is sitting there putting out 12V with no load, and you pull 1A of current from it, how much does the voltage change?

--
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com
Reply to
Tim Wescott

What if we just ignore the Rds (on) altogether because its too low and only consider the Load resistance that can be connected to the power supply just like I did in the above mentioned calculations in my last post (6 ohm). One more question

Can I assume 2A as an average current supply by the 12 V power supply? Because if it is true than I_avg = 0.636 x I_max ; I_max = 3.1 A peak to peak or (1.5 peak) which can generate a voltage of 194 V peak to peak across 100uH coil of reactance of 62.83 ohms at 100KHz. Is my calculation correct?

jess

Reply to
Jessica Shaw

Why? It's a *switch*. The Rds(on) of two FETs in series is near enough. A fraction of an ohm.

With the load as shown, one coil parallel tuned, the other not, the current in each coil will be unequal, moreover, assuming at or near resonance in one coil, they will be 180 degrees out of phase.

You're dissipating about 11 watts in each FET with the circuit as shown.

That's not the way to go about it. Measure the DC resistance of each coil, hopefully they're the same. Call this R.

Then Q=(2*pi*f*50*10^-6)/R, where f is the frequency. That should be good enough for a first approximation, R will increase a bit with frequency.

You've been shown various ways of *measuring* the Q. Pick one that suits your available equipment, at the frequency of interest, and measure it. Don't use the H bridge for measurements. That will allow for R(AC) not being quite equal to R(DC), see above.

--
"For a successful technology, reality must take precedence 
over public relations, for nature cannot be fooled."
                                       (Richard Feynman)
Reply to
Fred Abse

How am I dissipiting 11 watts at each FET?

I changed the load to series resonant circuit as shown in the following link

formatting link

So, now at F = 100KHz

both coils in series = 100uH ; XL = 62.3 ohm

Capacitor = 25nF ; Xc = 63.6 Ohm

How much current do I need Inorder to get 400 volts peak to peak across each inductor and what will be the voltage across the capacitor? Lets say I have a power supply of 12 V and 8.5 A.

thanks jess

Reply to
Jessica Shaw

12A peak (8.4A RMS) through the coils and capacitor. There will be about 4.4A average from your 12V supply. The capacitor will have about 800V peak across it.

John S

Reply to
John S

Error. I was thinking 400V peak when I answered. Disregard the above.

You will need about 6A peak (4.1A RMS) through the coils and capacitor to get 200V peak (400V p-p) across each coil. You will have about 400V peak across the capacitor. This will occur with an "on" time of about

2.25us at 100kHz. Your 12V supply current will be about 1.4A average.

John S

Reply to
John S

I think 6A should be peak to peak not peak.

Vc = I x Xc

400 = 63.6 x I ; I = 6.28 A peak to peak

If above calculations are correct than 12 V , 2A power supply will be sufficient.

jess

Reply to
Jessica Shaw

You said "400 volts peak to peak across each inductor". Notice that you said EACH inductor. Your Xl of 63.6 is for the TOTAL inductance (100uH) meaning you are off by 2 to 1.

However, your supply may be adequate although possibly marginal.

The LTSpice circuit follows: (Get rid of the damn snubbers!)

Version 4 SHEET 1 1100 680 WIRE 112 -400 0 -400 WIRE 256 -400 112 -400 WIRE 384 -400 256 -400 WIRE 496 -400 384 -400 WIRE 672 -400 576 -400 WIRE 672 -368 672 -400 WIRE 672 -272 672 -288 WIRE 112 -224 112 -400 WIRE 256 -224 256 -400 WIRE 112 -128 112 -160 WIRE 256 -128 256 -160 WIRE 0 -112 0 -400 WIRE 384 -112 384 -400 WIRE -208 -32 -256 -32 WIRE -48 -32 -128 -32 WIRE 512 -32 432 -32 WIRE 640 -32 592 -32 WIRE -256 0 -256 -32 WIRE 640 0 640 -32 WIRE 0 48 0 -16 WIRE 112 48 112 -48 WIRE 112 48 0 48 WIRE 256 48 256 -48 WIRE 384 48 384 -16 WIRE 384 48 256 48 WIRE -256 112 -256 80 WIRE 0 112 0 48 WIRE 0 112 -256 112 WIRE 32 112 0 112 WIRE 192 112 112 112 WIRE 320 112 272 112 WIRE 384 112 384 48 WIRE 640 112 640 80 WIRE 640 112 384 112 WIRE 0 176 0 112 WIRE 112 176 0 176 WIRE 384 176 384 112 WIRE 384 176 240 176 WIRE 112 208 112 176 WIRE 240 208 240 176 WIRE 112 304 112 272 WIRE 240 304 240 272 WIRE 0 320 0 176 WIRE 384 320 384 176 WIRE -528 400 -624 400 WIRE -416 400 -528 400 WIRE -48 400 -336 400 WIRE 640 400 432 400 WIRE 816 400 720 400 WIRE 944 400 816 400 WIRE -624 432 -624 400 WIRE 0 432 0 416 WIRE 112 432 112 384 WIRE 240 432 240 384 WIRE 384 432 384 416 WIRE 944 432 944 400 WIRE -624 528 -624 512 WIRE 944 528 944 512 FLAG 672 -272 0 FLAG 0 432 0 FLAG 384 432 0 FLAG -624 528 0 FLAG 944 528 0 FLAG -528 400 ALO FLAG 816 400 BLO FLAG 112 432 0 FLAG 240 432 0 SYMBOL nmos -48 -112 R0 SYMATTR InstName M1 SYMATTR Value FDB2532 SYMBOL nmos 432 -112 M0 SYMATTR InstName M2 SYMATTR Value FDB2532 SYMBOL nmos -48 320 R0 SYMATTR InstName M3 SYMATTR Value FDB2532 SYMBOL nmos 432 320 M0 SYMATTR InstName M4 SYMATTR Value FDB2532 SYMBOL voltage 672 -384 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 12 SYMBOL ind 16 128 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value 50u SYMATTR SpiceLine Rser=.3 SYMBOL cap 320 96 M90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 25n SYMATTR SpiceLine Rser=.03 SYMBOL voltage -624 416 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value PULSE(0 10 0 100n 100n {ton} 10u) SYMBOL voltage 944 416 M0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value PULSE(0 10 5u 100n 100n {ton} 10u) SYMBOL res -432 384 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 1.5 SYMBOL res 736 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 1.5 SYMBOL res -224 -48 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 1.5 SYMBOL res 608 -48 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 1.5 SYMBOL bv -256 -16 R0 SYMATTR InstName B1 SYMATTR Value V=V(BLO) SYMBOL bv 640 -16 R0 SYMATTR InstName B2 SYMATTR Value V=V(ALO) SYMBOL res 592 -416 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value .001 SYMBOL cap 96 -224 R0 SYMATTR InstName C2 SYMATTR Value .01u SYMBOL res 96 -144 R0 SYMATTR InstName R7 SYMATTR Value 20 SYMBOL cap 240 -224 R0 SYMATTR InstName C3 SYMATTR Value .01u SYMBOL res 240 -144 R0 SYMATTR InstName R8 SYMATTR Value 20 SYMBOL cap 224 208 R0 SYMATTR InstName C4 SYMATTR Value .01u SYMBOL res 224 288 R0 SYMATTR InstName R9 SYMATTR Value 20 SYMBOL cap 96 208 R0 SYMATTR InstName C5 SYMATTR Value .01u SYMBOL res 96 288 R0 SYMATTR InstName R10 SYMATTR Value 20 SYMBOL ind 176 128 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L2 SYMATTR Value 50u SYMATTR SpiceLine Rser=.3 TEXT -832 128 Left 2 !.tran 0 1m .5m TEXT 872 -168 Left 2 !.param ton=2.25u

Reply to
John S

On Fri, 6 Jan 2012 12:15:47 -0800 (PST), Jessica Shaw wrote:

--- There's no way to tell unless you know the Q of the LC.

Here's an LTspice simulation you can play with to see what you're up against:

Version 4 SHEET 1 920 744 WIRE -32 -176 -272 -176 WIRE 464 -176 -32 -176 WIRE 656 -176 464 -176 WIRE -32 -144 -32 -176 WIRE 464 -144 464 -176 WIRE -80 -64 -112 -64 WIRE 544 -64 512 -64 WIRE 656 48 656 -176 WIRE -32 96 -32 -48 WIRE 0 96 -32 96 WIRE 144 96 64 96 WIRE 336 96 224 96 WIRE 464 96 464 -48 WIRE 464 96 416 96 WIRE -272 128 -272 -176 WIRE -32 224 -32 96 WIRE 464 224 464 96 WIRE -80 304 -112 304 WIRE 544 304 512 304 WIRE -32 352 -32 320 WIRE 224 352 -32 352 WIRE 464 352 464 320 WIRE 464 352 224 352 WIRE 656 352 656 112 WIRE 656 352 464 352 WIRE -272 464 -272 192 WIRE -144 464 -144 432 WIRE -48 464 -48 432 WIRE -272 608 -272 544 WIRE -144 608 -144 544 WIRE -144 608 -272 608 WIRE -48 608 -48 544 WIRE -48 608 -144 608 WIRE 224 608 224 352 WIRE 224 608 -48 608 WIRE -272 704 -272 608 FLAG -272 704 0 FLAG -112 -64 PH1 FLAG 544 304 PH1 FLAG -144 432 PH1 FLAG 544 -64 PH2 FLAG -112 304 PH2 FLAG -48 432 PH2 SYMBOL ind 320 112 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value 100µ SYMBOL cap 0 112 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C1 SYMATTR Value 25n SYMBOL nmos -80 -144 R0 SYMATTR InstName M1 SYMATTR Value FDS6690A SYMBOL voltage -48 448 R0 WINDOW 3 24 96 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 15 5u .1u .1u 4u 10u) SYMBOL voltage -144 448 R0 WINDOW 0 23 11 Left 2 WINDOW 3 24 16 Invisible 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value PULSE(0 15 0 .1u .1u 4u 10u) SYMBOL voltage -272 448 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL nmos -80 224 R0 SYMATTR InstName M3 SYMATTR Value FDS6690A SYMBOL nmos 512 -144 M0 SYMATTR InstName M2 SYMATTR Value FDS6690A SYMBOL nmos 512 224 M0 SYMATTR InstName M4 SYMATTR Value FDS6690A SYMBOL diode -256 192 R180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D1 SYMBOL cap 640 48 R0 SYMATTR InstName C2 SYMATTR Value 1µ SYMBOL res 240 80 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 TEXT -250 640 Left 2 !.tran 1ms

The gate clocks are non-overlapping so you don't have to worry about shoot-through, you can change the value of R1 to spoil the Q, and you can change the value of V3 to get the drive you need.

The cicuit's not at all optimized, but what is it you're trying to do, anyway?

-- JF

Reply to
John Fields

...

Nope, missing bits, no workee :(

The circuit doesn't even load, at least John S' circuit loaded into LTSpice and produced 400V +ve peak. Though I asked sim to stop at 600ms.

Grant.

Reply to
omg

Holey crap! You can stop long before that. Try 1ms.

John S

Reply to
John S

Oops, 600us! You had from .5m to 1m, so I went 1m to .6m, yes.

Grant.

Reply to
omg

Sure it works. I'm guessing you missed John's intention when he said: "you can change the value of R1 to spoil the Q"

Ed

Reply to
ehsjr

On Fri, 06 Jan 2012 12:15:47 -0800, Jessica Shaw wrote:

In your quoted circuit:

formatting link

With your oddball load of one inductor in series with a parallel LC circuit, that's what you would get.

That's better, less dissipation, lots of current in the inductors.

The voltage across each inductor depends upon the *total* Q, ie. the Q of the inductors and that of the capacitor.

***In a series resonant circuit, the voltage across each series element is Q times the voltage across the combination.***

The voltage across the capacitor will be the same as that across both inductors, at resonance.

In the example below. you get about 900V peak across the capacitor, with 12 volt excitation, that's 450 volts across each inductor.

Make sure the capacitor is rated for such voltage!

We now come to the drive. With your choice of driver IC, the maximum dead time available (from the datasheet fig.30) is about 110 nanoseconds. Your values of LDEL and HDEL resistors (100k), give about 40 nanoseconds. The amount of dead time has an influence on dissipation in the FETs. Increasing the value of those resistors to 250k decreases dissipation in the model from about 1.5 watts per device, to about 0.5 watts per device.

I've attempted to model the HIP4081A drive conditions, but it's not perfect.

I've also added a pickup coil, loosely coupled to the Helmholz pair, with a 1k load resistor.

I've not modeled the ESR of the capacitor, since I don't know it. That will affect the Q, but probably will be in the milliohms range, so not by much. You need to pick a capacitor to stand the voltage, then we can maybe get some information from the maker's data.

I've used FETs from the LTspice library, rather than your original choice, since you appear to have difficulty with FETs as subcircuits.

E. & O. E.

Version 4 SHEET 1 1352 680 WIRE 320 -560 256 -560 WIRE 320 -528 320 -560 WIRE 1104 -416 1008 -416 WIRE 1152 -416 1104 -416 WIRE 1184 -416 1152 -416 WIRE 48 -384 -32 -384 WIRE 256 -384 256 -560 WIRE 256 -384 48 -384 WIRE 576 -384 256 -384 WIRE 720 -384 576 -384 WIRE 1008 -384 1008 -416 WIRE 1104 -384 1104 -416 WIRE 1184 -384 1184 -416 WIRE 48 -304 48 -384 WIRE 576 -304 576 -384 WIRE 1008 -272 1008 -304 WIRE 1104 -272 1104 -320 WIRE 1104 -272 1008 -272 WIRE 1184 -272 1184 -304 WIRE 1184 -272 1104 -272 WIRE 576 -208 576 -240 WIRE 48 -192 48 -240 WIRE 1104 -192 1104 -272 WIRE -288 -128 -352 -128 WIRE -32 -128 -32 -384 WIRE 720 -128 720 -384 WIRE 1056 -128 1008 -128 WIRE -32 -112 -32 -128 WIRE 720 -112 720 -128 WIRE 1056 -112 1056 -128 WIRE -352 -96 -352 -128 WIRE -224 -96 -256 -96 WIRE -128 -96 -160 -96 WIRE 848 -96 816 -96 WIRE 944 -96 912 -96 WIRE 288 -48 160 -48 WIRE 448 -48 368 -48 WIRE -288 -32 -288 -128 WIRE -256 -32 -256 -96 WIRE -256 -32 -288 -32 WIRE -240 -32 -256 -32 WIRE -128 -32 -128 -96 WIRE -128 -32 -160 -32 WIRE -96 -32 -128 -32 WIRE -80 -32 -96 -32 WIRE 288 -32 288 -48 WIRE 368 -32 368 -48 WIRE 784 -32 768 -32 WIRE 816 -32 816 -96 WIRE 816 -32 784 -32 WIRE 832 -32 816 -32 WIRE 944 -32 944 -96 WIRE 944 -32 912 -32 WIRE 1008 -32 1008 -128 WIRE 1008 -32 944 -32 WIRE -352 0 -352 -16 WIRE -32 0 -32 -16 WIRE -32 0 -352 0 WIRE 48 0 48 -112 WIRE 48 0 -32 0 WIRE 96 0 48 0 WIRE 160 0 160 -48 WIRE 448 0 448 -48 WIRE 576 0 576 -128 WIRE 576 0 448 0 WIRE 720 0 720 -16 WIRE 720 0 576 0 WIRE 1056 0 1056 -32 WIRE 1056 0 720 0 WIRE 48 64 48 0 WIRE 576 64 576 0 WIRE 288 80 288 48 WIRE 368 80 368 48 WIRE 368 80 288 80 WIRE 48 160 48 128 WIRE 576 160 576 128 WIRE -32 256 -32 0 WIRE 720 256 720 0 WIRE -32 272 -32 256 WIRE 720 272 720 256 WIRE -224 288 -256 288 WIRE -128 288 -160 288 WIRE 848 288 816 288 WIRE 944 288 912 288 WIRE -256 352 -256 288 WIRE -256 352 -352 352 WIRE -224 352 -256 352 WIRE -128 352 -128 288 WIRE -128 352 -144 352 WIRE -96 352 -128 352 WIRE -80 352 -96 352 WIRE 784 352 768 352 WIRE 816 352 816 288 WIRE 816 352 784 352 WIRE 848 352 816 352 WIRE 944 352 944 288 WIRE 944 352 928 352 WIRE 1056 352 944 352 WIRE -352 368 -352 352 WIRE 1056 368 1056 352 WIRE -32 400 -32 368 WIRE 48 400 48 240 WIRE 48 400 -32 400 WIRE 256 400 48 400 WIRE 576 400 576 240 WIRE 576 400 256 400 WIRE 720 400 720 368 WIRE 720 400 576 400 WIRE 256 432 256 400 FLAG 256 432 0 FLAG 320 -448 0 FLAG 1056 448 0 FLAG -352 448 0 FLAG 1104 -192 0 FLAG -96 -32 ULG FLAG -96 352 LLG FLAG 784 -32 URG FLAG 784 352 LRG FLAG -32 -128 ULD FLAG 720 -128 URD FLAG -32 256 LLD FLAG 720 256 RLD FLAG 1152 -416 Pickup IOPIN 1152 -416 Out SYMBOL voltage 320 -544 R0 WINDOW 123 0 0 Left 2 WINDOW 39 24 34 Left 2 SYMATTR SpiceLine Rser=.01 SYMATTR InstName V1 SYMATTR Value 12 SYMBOL voltage -352 -112 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -62 146 Left 2 SYMATTR Value PULSE(0.85 11.05 0 25n 25n {5u-Td} 10u) SYMATTR InstName V2 SYMBOL voltage 1056 -128 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -103 -25 Left 2 SYMATTR Value PULSE(0 11.05 5u 25n 25n {5u-Td} 10u) SYMATTR InstName V3 SYMBOL ind2 272 -48 R0 SYMATTR InstName L1 SYMATTR Value 53.62e-6 SYMATTR Type ind SYMATTR SpiceLine Rser=0.560812 SYMBOL ind2 352 64 M180 WINDOW 0 36 80 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName L2 SYMATTR Value 53.62e-6 SYMATTR Type ind SYMATTR SpiceLine Rser=0.560812 SYMBOL cap 160 -16 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 23.0405e-9 SYMBOL voltage 1056 352 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 3 -96 130 Left 2 SYMATTR Value PULSE(0.85 11.05 0 25n 25n {5u-Td} 10u) SYMATTR InstName V4 SYMBOL voltage -352 352 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V5 SYMATTR Value PULSE(0 11.05 5u 25n 25n {5u-Td} 10u) SYMBOL res 816 -16 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R1 SYMATTR Value 1.5 SYMBOL res 832 368 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R2 SYMATTR Value 1.5 SYMBOL res -256 -16 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R3 SYMATTR Value 1.5 SYMBOL res -240 368 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R4 SYMATTR Value 1.5 SYMBOL diode 848 -112 M90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL diode 848 272 M90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName D2 SYMATTR Value 1N4148 SYMBOL diode -160 -80 M270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D3 SYMATTR Value 1N4148 SYMBOL diode -160 304 M270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName D4 SYMATTR Value 1N4148 SYMBOL ind2 992 -400 R0 SYMATTR InstName L3 SYMATTR Value 50u SYMATTR Type ind SYMATTR SpiceLine Rser=0.560812 SYMBOL res 1168 -400 R0 SYMATTR InstName R5 SYMATTR Value 1000 SYMBOL cap 1088 -384 R0 SYMATTR InstName C2 SYMATTR Value 50.066e-9 SYMBOL res 32 144 R0 SYMATTR InstName R6 SYMATTR Value 22 SYMBOL res 32 -208 R0 SYMATTR InstName R7 SYMATTR Value 22 SYMBOL res 560 -224 R0 SYMATTR InstName R8 SYMATTR Value 22 SYMBOL res 560 144 R0 SYMATTR InstName R9 SYMATTR Value 22 SYMBOL cap 32 64 R0 SYMATTR InstName C3 SYMATTR Value .01u SYMBOL cap 560 64 R0 SYMATTR InstName C4 SYMATTR Value .01u SYMBOL cap 560 -304 R0 SYMATTR InstName C5 SYMATTR Value .01u SYMBOL cap 32 -304 R0 SYMATTR InstName C6 SYMATTR Value .01u SYMBOL nmos -80 -112 R0 SYMATTR InstName M1 SYMATTR Value FDB2532 SYMBOL nmos -80 272 R0 SYMATTR InstName M2 SYMATTR Value FDB2532 SYMBOL nmos 768 -112 M0 SYMATTR InstName M3 SYMATTR Value FDB2532 SYMBOL nmos 768 272 M0 SYMATTR InstName M4 SYMATTR Value FDB2532 TEXT 744 432 Left 2 !.tran 0 1m 500u 10n TEXT 264 104 Left 2 !K1 L1 L2 25.161320e-3 TEXT 96 -104 Left 2 ;Derived from FEMM model of Helmholz pair of two\n2" dia. coils of 25 turns 22AWG wire, spaced\n4" apart. TEXT 112 40 Left 2 ;To resonate at 100kHz TEXT 744 456 Left 2 !.param Td=40n TEXT 880 -352 Left 2 !K2 l1 l3 1e-3 TEXT 880 -320 Left 2 !K3 l2 l3 2e-3 TEXT 200 504 Left 2 !.meas tran M1diss avg(V(URD,LLD)*Id(M1)+V(ULG,LLD)*Ig(M1)) TEXT 200 528 Left 2 !.meas tran M2diss avg(V(LLD)*Id(M2)+V(LLG)*Ig(M2)) TEXT 200 552 Left 2 !.meas tran M3diss avg(V(URD,RLD)*Id(M3)+V(URG,RLD)*Ig(M3)) TEXT 200 576 Left 2 !.meas tran M4diss avg(V(RLD)*Id(M4)+V(LRG)*Ig(M4)) TEXT 960 -440 Left 2 ;"Pickup" coil (arbitrarily placed off-axis). TEXT 744 480 Left 2 ;Td = dead time TEXT 200 600 Left 2 !.meas tran capvolts max (V(n005,LLD))

--
"For a successful technology, reality must take precedence 
over public relations, for nature cannot be fooled."
                                       (Richard Feynman)
Reply to
Fred Abse

Hi,

What resistance value did you use to calculate the average current?

jess

Reply to
Jessica Shaw

Hi,

I tired to get the spice model for the HIP4081A but no luck. I am also thinking of trying NCP5106. It simulation files are available from the following link.

formatting link

I tried to run the model in LT Spice but no luck. Any suggestion how to run this model in LT Spice.

jess

Reply to
Jessica Shaw

The effective impedance of the source and the allowable size of the resistor that you can hang off of it have very little relation to each other. Trying to infer something about the source impedance by looking at the size of the resistor that you can hang off of it is like trying to infer how fast a car will go by what color it is painted.

If you're going to pull numbers out of handbooks, understand what you're doing. I_avg = 0.636 * I_peak, but _only_ if your efficiency is 100%.

No. And if you redo it for the correct numbers, where are you going to get the 388V * efficiency that you need to drive the current?

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply to
Tim Wescott

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