SMPS design EMC conducted noise problem

I take it from this that you don't have any impedance between the bridge and the switcher. You typically need a small impedance in that path so that the impedance going back out to the power lines is greater than the impedance of the input filter. If you can't rearrange things so that an existing impedance does this, adding an inductor here is likely to help.

This sounds very bad. Is this only a 2 sided PCB?

You need to make all the ground currents in a switcher get to the common point with a low enoigh impedance that it doesn't find another path shuch as out th eoutput side wires and back in on the mains wires.

Many thanks for your answer. It is a 2 sided PCB. Would a 4-layer PCB help?

Cheers, Jerry

I'm unfamiliar with a CISPB standard.

CISPR standards, set by the "Comite International Special des Perturbations Radioelectriques" include references to Class B information technology equipment in the CISPR22 standard. Is this what you are testing to, using the Line Impedance Stabilization Network (LISN) of CISPR11?

If so, then conducted emissions will see a dierential mode source impedance of 50 ohms, and a common mode source impedance of roughly half that. I'm unsure how this unit of yours can be tested without a wall-wart source, as conducted emission limits are only intended to apply to the common AC line ports (commonly 120 or 240 VAC).

Class B levels require interference currents to be reduced to the microamp range. Simple KVL and KCL impedance calculations suggest that increasing the impedance of the source (ie the power supply) will be required to inhibit switching current flow in the input wiring, during input rectifier conduction periods, if the wall-wart doesn't produce this impedance transformation.

At this frequency, the ground plane has little effect on conducted interference of a single converter operating from a two-wire input, unless an inappropriate connection is made to the safety earth ground plane in the test site. The input current to the buck regulator is discontinuous and pulsating with a strong fundamental, which must be supplied solely by your local capacitors.

Perhaps you could clarify both your reference to the standards and your test set-up.

RL

Sometimes you have to go 4 layers. If you can't make a good ground with only double sided, it is worth going to 4 layers.

Before going to the added cost, you can try filling the other side of the PCB with ground traces and adding a bunch of vias to hook the top and bottom ground connections together. Basically, you do it like this:

Assuming most of the top side traces run north-south and most of the bottom side traces run east-west these will also be the directions of the gaps in the ground. On both sides, there will be grounds between the traces. You add the vias as needed to hook the grounds to the grounds to shorten the current paths.