Slow SEPIC sim

Are you running Win7? Have you tried the speed up tricks I discussed in April? Here's my post:

On Sunday, April 7, 2019 at 5:50:33 PM UTC-4, Steve Wilson wrote: People using Win7 may find their computer is slow and sluggish. Here are 12 tips that can dramatically speed up Win7:

I found two that had good effect:

1. Change Power Settings
2. Turn Off Aero Eeffects

We have a requirement to have our septic systems either cleaned or inspected every five years. I wonder if I could provide a certificate of inspection for a SEPIC system instead? Think that would get past the guards?

I'm using an LTC3803 and a DRQ127 dual inductor to make my Sepic converter, +24 to adjustable +5 to +75 out. It turns out that the current limit works in constant power output fashion, which is exactly what I want to power my pulse generator.

My PC does seem slow lately. I'll have my IT guy look at it.

The key spice settings are:

RELTOL TRTOL MAXSTEPSIZE (not sure of the name in LTSpice MAXT?)

Setting TRTOL from its LT default of 1 upwards to the Spice3 default of 7 can increase speed by a factor of maybe 3. However, SMPS can get too inaccurate if this is set too hight.

Same argument for RELTOL. Try and have it relaxed at 1e-3 levels, but again it might need to be tighter, even down to 10e-6 for some circuits.

MAXT only as small as required to get a good looking waveform. Again, if too large can cause SMPS to output garbage.

The advice from Ken Kundurt, Cadence Spectre creator, is to try and use the RELTOL value to get accuracy rather than going for a TRTOL=1.

Spice can only handle about 12 digits of span, so if its high current ABSTOL might need to be set higher. Spice3 default is 1pa, in SuperSpice I set it to 10pa, however, for SMPS setting it to 1na or larger might be required.

I have a SMPS example in SuperSpice with TRTOL=5, RELTOL=500u MAXSTEP=200ns for a 200us run with a clock at 500kHz which runs in about 5 seconds.

Its possible that the model has problems causing convergence problems. What's the schematic? One wants to make most bits behavioural.

-- Kevin Aylward

Thanks. I'll play with those settings.

I don't (currently) have convergence problems, it's just annoyingly slow. I guess I could check out Drudge or Youtube as it runs.

Here's what I have now:

It has a bit of sub-cycle effects, and a startup glitch (U2 can wind up), so it needs tweaking.

It runs maybe 300 us/sec with the alternate solver, and I have a lot of cases to test.

What's slick is that my flyback became a SEPIC by adding C5, but now it doesn't need a snubber.

If you have a coupled inductor in it set that to K=1 for longer sims, when looking at loop stability, ring-out and stuff. Then back to K=0.98 or whatever it is in reality for cycle-to-cycle observations.

Coupled inductors with an coupling coefficient other than "1" can really slows stuff down. Can turn a PC into a big space heater.

I tried that, but it didn't seem to make much difference.

.options reltol=0.01

helps a lot, about 2:1.

Alternate solver is good too.

Here's a sweep of the Sepic converter, open loop with a swept output clamp voltage from 0 to +100, showing the current and power limits. It has features.

This takes about half an hour to run, and makes a roughly 6 gbyte .raw file. After the sim is over, it takes about a minute to add another node to the plot.

The main sim doesn't run much faster if I limit the saved variables.

My CPU utilization shows about 30% while this is running.

CPU temp?

Just had to blow out my laptop (24 screws. . . in sequence!)

RL

R9 = 0.0 ohms, no feedback, open loop. It is a good idea to reduce all filter time constants in the initial test until all bugs are eliminated, th en increase filtering to your needs. Increase the current sense resistor to about 0.50R for test and add a 100 PF cap at the sense IC input. Do not let the smoke out!

Harry D.

That's only for the current-limit test.

Bugs? I've used the LT3803 and the DRQ inductor combo before, and it works great. I can always tweak resistor and cap values if needed, after the board is built. The simulations seem to be pretty good.

I've been concerned about stray inductance in R1 spiking the switcher sense circuit, but I think the IC is clever enough to ignore that.

For some reason, slope compensation (which would be about 5K on R7) makes this one worse. It usually helps.

We were just talking about whether we'll want to heat sink the dual inductor, which I've done before. Probably not at this power level, but the +24 and ground pins will sit over copper pours, so we may as well dump some heat.