I see that Micron SDRAMs are claimed to support Concurrent auto precharge. Is this a common feature amongst SDRAMs?
I'm using a sample of a ICSI SDRAM at present and this feature isn't mentioned in the data sheet. Is it safe for me to presume it doesn't support Concurrent auto precharge?
I am trying to write and read blocks of 4 words and don't really want to extend the buffering to accommodate an 8 word burst!
Hi,
do you mean that you want to precharge for example bank A while still accessing bank B ?
Rgds André
precharge.
Sorry for the delay in replying but yes it is where I can have 2 banks active and use auto precharge to close a bank. The select another row, in the bank just closed, to give a near continuous data flow.
to
ICSI have admitted that this device is from an old batch of silicon which doesn't have this feature. I find it a bit annoying that there isn't a revision code on the IC which could have had a corresponding datasheet. Amazing lack of change control. Beware!
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