Running out of ideas: stability, bootstrap

Indeed. Zin for the cascode Q3 emitter is 100/beta and beta = fT/f, which is 13 at 10MHz for FZT851, or Zin = 7.7 ohms at 10MHz, rising with f, acting as nasty 207nH inductor. Not to mention a 1.3nV.rt-Hz voltage-noise source. Axe that 100 ohms.

--
 Thanks, 
    - Win

Am 30.05.2017 um 12:55 schrieb Winfield Hill:

Yes, the 100R are just there to check the sensitivity. The bad thing is that even for a zero Ohm resistor, the S11 comes only a bit closer to the circle that encloses the positive resistance region, but it still takes a walk outside.

But I need at least a few Ohms so I can insert the buffered input voltage for the bootstrap.

The entire bias chain has no impact on the total noise, even including the Zener and with absolutely minimum decoupling.

Here is a stripped down version in LTspice:

screendump: <

>

noise results, including some contributors:

It seems that above 1 MHz, the active loads quickly becomes ineffective in suppressing the VCC noise. But 1 MHz BW is enough.

regards, Gerhard

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Version 4 SHEET 1 2048 2404 WIRE -160 -320 -336 -320 WIRE 48 -320 -160 -320 WIRE 128 -320 48 -320 WIRE 256 -320 128 -320 WIRE 256 -272 256 -320 WIRE -336 -256 -336 -320 WIRE 128 -256 128 -320 WIRE -160 -224 -160 -320 WIRE 48 -192 48 -240 WIRE 128 -144 128 -192 WIRE 128 -144 112 -144 WIRE 256 -144 256 -208 WIRE 256 -144 128 -144 WIRE 128 -112 128 -144 WIRE 384 -96 352 -96 WIRE 496 -96 464 -96 WIRE -384 -32 -464 -32 WIRE 352 -16 352 -96 WIRE 496 -16 496 -96 WIRE 496 -16 416 -16 WIRE -336 32 -336 -256 WIRE -160 32 -160 -144 WIRE -160 32 -240 32 WIRE -112 32 -160 32 WIRE -32 32 -112 32 WIRE 464 32 432 32 WIRE 480 32 464 32 WIRE -384 48 -384 -32 WIRE 432 64 432 32 WIRE 48 80 48 -96 WIRE 352 80 352 -16 WIRE 352 80 48 80 WIRE 400 80 352 80 WIRE -464 96 -464 48 WIRE 496 96 496 -16 WIRE 496 96 464 96 WIRE 400 112 384 112 WIRE -160 128 -160 32 WIRE -32 144 -32 32 WIRE 240 144 -32 144 WIRE 384 144 384 112 WIRE 384 144 320 144 WIRE -384 176 -384 96 WIRE -384 176 -464 176 WIRE -336 176 -336 112 WIRE 432 176 432 128 WIRE 48 192 48 80 WIRE 496 208 496 96 WIRE -160 240 -160 208 WIRE -160 240 -208 240 WIRE -64 240 -80 240 WIRE -16 240 -64 240 WIRE -208 304 -208 240 WIRE -160 304 -160 240 WIRE -208 400 -208 368 WIRE -160 400 -160 368 WIRE 48 432 48 288 WIRE 48 448 48 432 WIRE -304 512 -384 512 WIRE -176 512 -240 512 WIRE -144 512 -176 512 WIRE 0 512 -144 512 WIRE 64 544 48 544 WIRE 144 544 64 544 WIRE 256 544 144 544 WIRE 368 544 320 544 WIRE 496 544 496 208 WIRE 496 544 448 544 WIRE 64 624 64 544 WIRE 176 624 64 624 WIRE 496 624 496 544 WIRE 496 624 256 624 WIRE 64 656 64 624 WIRE 496 672 496 624 WIRE -384 688 -384 512 WIRE -176 688 -176 512 WIRE 64 784 64 736 WIRE 400 784 256 784 WIRE 496 784 496 752 WIRE 496 784 464 784 WIRE -384 832 -384 768 WIRE -176 832 -176 768 WIRE 384 864 304 864 WIRE 496 864 496 784 WIRE 496 864 464 864 WIRE -384 880 -384 832 WIRE 304 912 304 864 WIRE 448 960 416 960 WIRE 480 960 448 960 WIRE -384 992 -384 960 WIRE 416 992 416 960 WIRE 496 1008 496 864 WIRE 496 1008 448 1008 WIRE -176 1024 -176 832 WIRE 256 1024 256 784 WIRE 256 1024 -176 1024 WIRE 304 1024 304 976 WIRE 304 1024 256 1024 WIRE 384 1024 304 1024 WIRE 496 1040 448 1040 WIRE 352 1088 320 1088 WIRE 416 1088 416 1056 WIRE 416 1088 352 1088 FLAG 240 1088 0 FLAG -336 256 0 FLAG -384 992 0 FLAG -144 512 vgat FLAG 48 432 drain FLAG 496 208 op_out FLAG -336 -256 vcc FLAG -64 240 Vbase FLAG 448 960 vcc FLAG 352 1088 vee FLAG -176 832 bias FLAG 144 544 source FLAG -384 832 vgen FLAG -464 512 0 FLAG 432 176 vee FLAG -112 32 center FLAG -208 400 0 FLAG 128 -32 0 FLAG 496 1040 0 FLAG -240 96 0 FLAG 64 784 0 FLAG 464 32 vcc FLAG -160 400 0 FLAG 624 272 0 FLAG 688 320 0 FLAG 688 224 0 SYMBOL voltage -336 160 R0 WINDOW 0 -32 56 VBottom 2 WINDOW 3 32 56 VTop 2 WINDOW 123 0 0 Left 2 WINDOW 39 -52 151 VTop 2 SYMATTR InstName V1 SYMATTR Value 9.8 SYMATTR SpiceLine Rser=0.001 SYMBOL voltage -384 864 R0 WINDOW 123 34 174 Left 2 WINDOW 39 24 132 Left 2 SYMATTR Value2 AC 1 1 SYMATTR SpiceLine Rser=0 SYMATTR InstName V2 SYMATTR Value SINE(0.0 0.005 1000 0 0 0) SYMBOL voltage 224 1088 R270 WINDOW 123 24 160 Left 2 WINDOW 39 -27 -60 Left 2 WINDOW 3 -2 -31 Left 2 WINDOW 0 -16 -106 Left 2 SYMATTR SpiceLine Rser=0.1 SYMATTR Value 4.98 SYMATTR InstName V4 SYMBOL res 160 608 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R20 SYMATTR Value 100 SYMBOL res 48 640 R0 SYMATTR InstName R30 SYMATTR Value 0.1 SYMBOL cap -240 496 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C7

SYMBOL res -192 672 R0 WINDOW 0 -65 75 Left 2 WINDOW 3 -67 107 Left 2 SYMATTR InstName R39 SYMATTR Value 60meg SYMBOL njf 0 448 R0 WINDOW 0 -21 39 Left 2 WINDOW 3 -30 101 Left 2 WINDOW 123 -34 130 Left 2 SYMATTR InstName J1 SYMATTR Value IF3601 SYMATTR Value2 m=4 SYMBOL res -368 496 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R12 SYMATTR Value 9999Meg SYMBOL res 512 768 R180 WINDOW 0 36 76 Left 2 WINDOW 3 -77 43 Left 2 SYMATTR InstName R15 SYMATTR Value 10meg SYMBOL Opamps\\LT1792 416 960 M0 SYMATTR InstName U5A SYMBOL e -336 16 R0 SYMATTR InstName E1 SYMATTR Value 5 SYMBOL res -480 -48 R0 SYMATTR InstName R1 SYMATTR Value 60 SYMBOL res 464 528 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R23 SYMATTR Value 0 SYMBOL cap 288 912 R0 SYMATTR InstName C5

SYMBOL voltage -464 80 R0 WINDOW 0 -32 56 VBottom 2 WINDOW 3 32 56 VTop 2 WINDOW 123 0 0 Left 2 WINDOW 39 -57 138 VTop 2 SYMATTR InstName V3

SYMATTR SpiceLine Rser=0.1 SYMBOL res 336 128 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R14 SYMATTR Value 100 SYMBOL res 480 848 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R18 SYMATTR Value 10meg SYMBOL cap 416 -32 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C3 SYMATTR Value 47p SYMBOL zener -192 368 R180 WINDOW 0 24 64 Left 2 WINDOW 3 -46 -65 Left 2 SYMATTR InstName D3 SYMATTR Value BZX84-C2v7 SYMBOL pnp 112 -96 R180 SYMATTR InstName Q1 SYMATTR Value ZTX951 SYMBOL res 32 -336 R0 SYMATTR InstName R1005 SYMATTR Value 33 SYMBOL res 112 -128 R0 SYMATTR InstName R1006 SYMATTR Value 1k SYMBOL diode 112 -256 R0 WINDOW 0 46 -11 Left 2 WINDOW 3 40 48 Left 2 WINDOW 123 48 21 Left 2 SYMATTR InstName D1003 SYMATTR Value BAV99S SYMATTR Value2 n=5 SYMBOL res 480 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R17 SYMATTR Value 400k SYMBOL res -176 112 R0 WINDOW 3 38 71 Left 2 SYMATTR InstName R1003 SYMATTR Value 240 SYMBOL cap 464 768 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C8 SYMATTR Value 2n2 SYMBOL cap -256 32 R0 WINDOW 3 42 43 Left 2

SYMATTR InstName C1001 SYMATTR SpiceLine Rser=0.1 SYMBOL res -64 224 R90 WINDOW 0 66 -8 VBottom 2 WINDOW 3 40 56 VTop 2 SYMATTR InstName R1414 SYMATTR Value 0.1 SYMBOL cap 320 528 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C6 SYMATTR Value 1p SYMBOL cap 240 -272 R0 SYMATTR InstName C1004

SYMBOL current -160 -224 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName I1 SYMATTR Value 10m SYMBOL Opamps\\opamp2 432 32 R0 SYMATTR InstName U1A SYMATTR Value ths4021 SYMBOL res -400 672 R0 SYMATTR InstName R1000 SYMATTR Value 0.01 SYMBOL cap -176 304 R0 WINDOW 3 42 43 Left 2 WINDOW 0 36 69 Left 2

SYMATTR InstName C1000 SYMATTR SpiceLine Rser=0.1 SYMBOL npn -16 192 R0 SYMATTR InstName Q3 SYMATTR Value ZTX851 TEXT 168 336 Left 2 !.noise V(op_out) V2 dec 1000 100 1E7 TEXT 168 304 Left 2 !;ac dec 1000 10m 100Meg TEXT -496 -80 Left 2 ;1nV/RtHz noise plus\njust non-zero offset TEXT -376 -352 Left 2 ;Vcc + E1 * 1n VRtHz noise TEXT 168 280 Left 2 !;tran 500s TEXT 168 248 Left 2 !.op TEXT 168 368 Left 2 !;.include d:\\lib\\spice\\ghf_spice_lib.txt TEXT -1528 -560 Left 2 !*******************************************************************************\n\n* THS4021 SUBCIRCUIT\n\n* HIGH SPEED MONLITHIC OPERATIONAL AMPLIFIER \n\n* WRITTEN 1/6/99\n\n* NULL PINS ARE NOT MODELED\n\n* TEMPLATE=X^@REFDES %IN+ %IN- %VCC+ %VCC- %OUT @MODEL\n\n* CONNECTIONS: NON-INVERTING INPUT\n\n* | INVERTING INPUT\n\n* | | POSITIVE POWER SUPPLY\n\n* | | | NEGATIVE POWER SUPPLY\n\n* | | | | OUTPUT\n\n* | | | | | \n\n* | | | | | \n\n* | | | | | \n\n.SUBCKT THS4021 1 2 3 4 5 \n\n*\n\n* INPUT *\n\nQ1 33

1 17 NPN_IN 1\n\nQ2 34 2 17 NPN_IN 1\n\n\n* PROTECTION DIODES *\n\nD2 5 3 D1N \n\nD1 4 5 D1N \n\nD4 4 2 D1N \n\nD6 4 1 D1N \n\nD5 1 3 D1N \n\nD8 22 1 D1N \n\nD7 22 2 D1N \n\nD3 2 3 D1N \n\n\n* SECOND STAGE *\n\nQ3 08 Vref 33 PNP 0.5\n\nQ6 10 08 09 NPN 0.25\n\nQ4 10 Vref 34 PNP 0.5\n\nQ5 08 09 11 NPN 1\n\nQ7 09 09 12 NPN 1\n\nCc 0 10 Ct 4p \n\nR3 4 11 333 \n\nR4 4 12 333\n\n\n* SLEW RATE ENHANCEMENT *\n\nG6 0 10 1 2 0.75e-3\n\n\n\n\n* HIGH FREQUENCY SHAPING *\n\nLhf 18 19 23n \n\nRhf 13 19 25 \n\nChf 0 13 9p \n\nEhf 18 0 10 0 1\n\n\n* OUTPUT *\n\nQ8 13 13 35 PNP 1\n\nQ9 13 13 14 NPN 1\n\nQ10 3 35 15 NPN 12\n\nQ11 4 14 16 PNP 14\n\nR5 20 15 10 \n\nR7 16 20 10\n\n\n\n\n* COMPLEX OUTPUT IMPEDANCE *\n\nR8 32 20 10 \n\nR9 31 20 10 \n\nL1 31 5 10n \n\nC1 32 5 25p \n\n\n\n\n* BIAS SOURCES *\n\nG1 3 33 3 4 6.3e-6 \n\nG2 3 34 3 4 6.3e-6\n\nG3 0 35 3 4 5.4e-6\n\nG4 17 4 3 4 5.25e-6\n\nG5 14 0 3 4 6.1e-6\n\nI1 3 33 DC 1.3e-3 \n\nI2 3 34 DC 1.3e-3 \n\nI3 0 35 DC 1.5e-3 \n\nI4 17 4 DC 1.3e-3 \n\nI5 14 0 DC 1.7e-3 \n\nV1 3 Vref DC 2 \n\n\n* MODELS *\n\n.MODEL NPN_IN NPN\n\n+ IS=170E-18 BF=400 NF=1 VAF=100 IKF=0.0389 ISE=7.6E-18\n\n+ NE=1.13489 BR=1.11868 NR=1 VAR=4.46837 IKR=8 ISC=8E-15\n\n+ NC=1.8 RB=25 RE=0.1220 RC=20 CJE=120.2E-15 VJE=1.0888 MJE=0.381406\n\n+ VJC=0.589703 MJC=0.265838 FC=0.1 CJC=133.8E-15 XTF=272.204 TF=12.13E-12\n\n+ VTF=10 ITF=0.147 TR=3E-09 XTB=1 XTI=5 KF=2.5E-13\n\n\n.MODEL NPN NPN\n\n+ IS=170E-18 BF=100 NF=1 VAF=100 IKF=0.0389 ISE=7.6E-18\n\n+ NE=1.13489 BR=1.11868 NR=1 VAR=4.46837 IKR=8 ISC=8E-15\n\n+ NC=1.8 RB=250 RE=0.1220 RC=200 CJE=120.2E-15 VJE=1.0888 MJE=0.381406\n\n+ VJC=0.589703 MJC=0.265838 FC=0.1 CJC=133.8E-15 XTF=272.204 TF=12.13E-12\n\n+ VTF=10 ITF=0.147 TR=3E-09 XTB=1 XTI=5\n\n\n.MODEL PNP PNP\n\n+ IS=296E-18 BF=100 NF=1 VAF=100 IKF=0.021 ISE=494E-18\n\n+ NE=1.49168 BR=0.491925 NR=1 VAR=2.35634 IKR=8 ISC=8E-15\n\n+ NC=1.8 RB=250 RE=0.1220 RC=200 CJE=120.2E-15 VJE=0.940007 MJE=0.55\n\n+ VJC=0.588526 MJC=0.55 FC=0.1 CJC=133.8E-15 XTF=141.135 TF=12.13E-12\n\n+ VTF=6.82756 ITF=0.267 TR=3E-09 XTB=1 XTI=5\n\n\n.MODEL Ct CAP TC1=-0.0025\n\n\n.MODEL D1N D IS=10E-15 N=1.836 ISR=1.565e-9 IKF=.04417 BV=30 IBV=10E-6 RS=45\n\n+ TT=11.54E-9 CJO=2E-12 VJ=.5 M=.3333\n\n\n.ENDS TEXT -24 -352 Left 2 ;active load needed for PSSR TEXT -384 1272 Left 2 !*ZETEX ZTX851 Spice model Last revision 21/1/93 (C) 1993 ZETEX PLC\n\n.MODEL ZTX851 NPN IS =1.0085E-12 NF =1.0001 BF =240 IKF=5.1 VAF=158\n\n+ ISE=2E-13 NE =1.38 NR =0.9988 BR =110 IKR=5.5 VAR=46 \n\n+ ISC=4.6515E-13 NC =1.334 RB =0.025 RE =0.018 RC =0.015 \n\n+ CJC=155E-12 MJC=0.4348 VJC=0.6477 CJE=1.05E-9 \n\n+ TF =0.79E-9 TR =24E-9\n \n.model if3601 njf beta=260m lambda=1m rd=40m rs=40m is=0.05n cgd=1200p m=0.5 cgs=600p\n+ pb=0.75 kf=1e-18 b=1.8 vto=-1.5\n \n \n.model bzx84-c2v7 d(is=110.88e-18 n=.92657 rs=.85899 ikf=147.68 cjo=344.69e-12 m=.31964\n+ vj=.72935 isr=1.5159e-6 bv=2.7639 ibv=69.770e-3 tt=17.889e-9 vpk=2.7 mfg=philips type=zener)\n \n \n.model bav99s d(is=7.4960e-9 n=2.0077 rs=.80464 ikf=.1058 cjo=515.09e-15 m=.115 vj=.6389 \n+ isr=1.4182e-9 nr=4.9950 bv=90.375 ibv=10 tt=2.1640e-9 iave=0.2 vpk=75 mfg=philips type=silicon)\n \n.model ztx951 pnp is=1.3766e-12 nf=1.013 bf=187 ikf=5.0 vaf=66.3 ise=1.4e-13 ne=1.41 nr=1.0099 \n+ br=56 ikr=0.9 var=33 isc=1.7e-12 nc=1.4 rb=0.029 re=0.020 rc=0.0255 cjc=287e-12 mjc=0.4522\n+ vjc=0.4956 cje=1.15e-9 tf=0.83e-9 tr=20e-9 TEXT 168 408 Left 2 !.savebias portable.bias internal TEXT 176 440 Left 2 !;.loadbias portable.bias

Am 29.05.2017 um 14:38 schrieb bitrex:

No, a very low noise amplifier with 60 dB gain, 100 mHz to 1 MHz. I'm aiming for 100pV/rtHz at least on the sweet spot.

The current source defines the bias current and the FET's gate voltage is adjusted by an integrator until the cascode collector equals the level of CENTER.

The signal gain from the gate to the output of U1A is determined by the gm of the FET array, which _is_ large and by the transimpedance amplifier. (assuming open loop)

The current source and the cascode transistor do not enter the equation other than second order effects like the ccs diverting some signal current or that the BJT has probably a much higher Early voltage and thus higher output impedance.

The integrator is also not in the signal path. It is as slow as molasse. It takes a minute until the window comparator thinks that the operating point has been reached. There may be some influence in the mHz region, but I have no problem there.

The current source is necessary to suppress the noise on VCC; without it it takes a supply better than 2nV/rtHz (for 8 FETs and twice the current). There also must be 5 diodes in series or the noise of the current source emitter resistor starts playing a role.

Gerhard

who got a 54754A differential TDR plug in this morning, still a month under service. That needs to be played with now. :-) :-)

If putting an inductor on the input makes an oscillator, this can only mean that energy is being fed from the output back to the input.

The two obvious paths for that are Cdg and Cgs.

You seem to have eliminated Cdg as a cause, by your report that the negative resistance is relatively insensitive to the cascode's base resistance.

Logically, this points suspicion at Cgs, a positive-feedback capacitance famous for making BJTs into oscillators.

I'd suspect your feedback loop, injecting energy into the FET array's source that couples through to its gate, except you've already reported that the problem persists even with the feedback loop disabled.

This leaves the FETs themselves.

You could also test the possibility that Cgs feedthrough is the cause, by temporarily lowering the operating current and disconnecting most of the JFET array.

If 4 x Cgs is a problem, 1 x Cgs should be one-fourth as bad.

If you can identify the source of the problem, you'll be able to devise a correction for it. (E.g., if this were r.f., neutralization.)

The frequency of oscillation for an input inductor L might give a hint as to the value of any capacitance at play here.

Cheers, James Arthur