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(Root) raised cosine matching filters

I've done some reading lately (in the likes of Proakis, Lathai, etc.), and they all discuss the use of raised cosine, root raised cosine, or similar "pulse" signals that occupy approximately constant bandwidths, are designed to largely eliminate ISI, etc. That's great. However, this is usually all in the context of digital (or at least discrete time) systems. Is anyone familiar with how you might go about building a matched filter for, say, a root raised cosine (RRC) pulse using traditional (continuous time) filtering? (The digital case is rather trivial! :-) ) I can see that, if one were to just build a relatively low order bandpass filter (say, just a Butterworth filter), the result probably wouldn't be _that_ far from the mark, but I imagine there's a somewhat more systematic way to do this?

Thanks,

---Joel Kolstad

Reply to
Joel Kolstad
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Digital implementation of a Finite Impulse Response filter is - as you say - relatively trivial.

The analogue continuous time equivalent is the tapped delay line filter, in which you hook up an op amp to each tap of a delay line and combine the weighed outputs of the taps with a summing amplifier. Since most tapped delay lines are actually sequences of linear-phase low pass filters, this is usually an inefficient way of realising your filter, but since you can buy tapped delay lines off the shelf, it can be the way to go for one off and small volume projects.

------------ Bill Sloman, Nijmegen

Reply to
bill.sloman

There were a bunch of papers on how to do this back in the '60s and '70s, for example in the Bell System TJ. The widespread use of DSP has led to this being done digitally these days.

However, if you really want to do this in analog, Nuhertz Technologies Filter Solutions program will synthesize RC and RRC filters for various alpha factors.

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Regards Ian

Reply to
Ian

Thanks for the information, Ian and Bill...

Actually I don't, but there's a perception that getting a matched filter and a detector done in analog is going to be simpler (faster) than digitizing and doing it in an FPGA. We'll see...

---Joel

Reply to
Joel Kolstad

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