Re: TSMC's 2nm (N2) node and the 7 GHz target (Re: Creating a "European CMOS 2.0 Army")

Jul 14, 2026 0 Replies


>Hi,


>
>TSMC's 2nm (N2) node and the 7 GHz target
>represent a monumental milestone in silicon
>manufacturing, shifting away from legacy
>FinFETs to advanced Gate-All-Around (GAA)
>nanosheet transistors.
>
>This evolution allows chip designers—particularly
>in the PC and AI sectors—to push processor
>clock speeds previously thought impossible
>on standard nodes
>
>AMD confirms Zen 6 rollout for its July 22 AI event
>
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>Production of the 6th Gen EPYC family is
>already ramping up. AMD says Venice is its
>first high-performance computing product
>manufactured using TSMC’s 2nm process
>technology.
>
>Bye
>
>Mild Shock schrieb:
>> Hi,
>>
>> For marketing purposes people
>> typically look at the race towards
>> 2nm, and we find:
>>
>> A month ago, Apple lost its exclusivity
>> on 3 nm smartphone processors with
>> MediaTek’s Dimensity 9400 chip, integrated
>> in the Vivo X200 Pro smartphone. Qualcomm
>> is also in the race with its recently
>> unveiled Snapdragon 8 Elite and set to
>> power the Xiaomi 15 Pro in 2025. However,
>> Apple should regain its position as innovation
>> leader in 2026 with the release of the
>> iPhone 18, which should feature the A20
>> chip built on TSMC’s 2 nm process."
>>
>> But there is a vertical vias revolution
>> going on as well, some SOCs typically
>> being at 18 layers now:
>>
>> Zooming Into a CPU (It's Incredible)
>>
formatting link
>
>> imec has coined the term CMOS 2.0:
>>
>> LEUVEN (Belgium), MARCH 12th, 2026 — Imec,
>> a world-leading research and innovation hub
>> in advanced semiconductor technologies, has
>> launched a first-of-its-kind consortium with
>> 26 European university groups that will jointly
>> work on the technology roadmap beyond
>> CMOS scaling (CMOS 2.0).
>>
formatting link

>>
>>
>> So we might see more mobile grade GPUs.
>>
>> Bye

I am forwarding this to sci.electronics.design


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