Re: 89C51ED2

> "TT_Man" wrote:

> > > > How does the defect manifest itself ? > > > > > 8051s have been 'rock solid' IME. As someone else memtioned, do you have
a
> > > critical timing issue anywhere ? Like an I/F chip maybe ? Are PSEN, ALE, > > > > /WR > > > > and /RD all clean ? You're probably not using PSEN but never hurts to > > > > check. > > > > > No-one's messed about with the clock oscillator parts have they ? > > > > > What do the 10 lines of code do ? > > > > > Graham > > > > An extra speech phrase is output.... ALE PSEN /wr/rd are all unused as the > > > device is a 64K flash part. We have several generations of board that all > > > support various chip types, 52, 53 ED2 etc. The faulty ED2's will not > > > execute correctly in any board. > > > The 10 lines of code basically index a speech phrase and output it 3 times > > > to a dac. Then the routine checks an input and proceeds or not via a

branch.

> > somewhere in these lines of code, another speech phrase is output. Speech

is

> > terminated via a null byte. The extra speech phrase in not contiguous with > > > the correct phrases, so it's not going to be a DPHL corruption...that > > > somehow skips the null byte detection. > > > Does the code have interrupts enabled? > > > Is it written in ASM or C? > > I think he said it was all written in asssembler .

On an 8051, asm is really the way to go. The OP was making comments about DPTR so I suspected asm but vagueness of his descriptions sounded like a C programmer who doesn't really know what is going on under the hood. Many C compilers overlay variables on the 8051 if he is doing interrupts in C code he may be running a routine in the interrupt code that overlays one of his variables.

> Graham
Reply to
MooseFET
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Not a prayer in hell 100% assembler. :)

Reply to
TT_Man

Are you using interrupts?

Reply to
MooseFET

">>

Everything is interrupt driven. Processor spends 99% in sleep mode.Int routines set flags and the background processes flags, then goes back to sleep. Dual 3 of 5 uarts are processed with 125uS RTC.

Reply to
TT_Man

This raises a BIG red flag for me - how long does the uP take to come out of sleep mode? How's the interrupt latency? Did it used to block other interrupts, or could they be stepping on each other?

But I've never trusted "sleep mode" - probably because it takes me about

3 hours after getting up, before I'm fully awake. ;-)

Do you have a little "morning eye-opener" circuit? ;-D

Good Luck! Rich

Reply to
Rich Grise

This is done all the time. First time I used the PCON features on a

88C51 was in the early 90's. You have to make sure it does a controlled wake up (socks, shoes, brush teeth, etc.) and know the time it takes. When you build analog/RF stuff where there needs to be radio silence you've got no other choice.

Back in the army one guy's eye opener circuit consisted of a serious stash of booze in the locker. Beats me how he evaded detection by the drill sergeant. By lunchtime you couldn't light a cigarette near the guy or there would have been an explosion.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

I think you need to look very carefully at the interrupt code to make sure that it doesn't forget to save part of the context. This sounds like it is either timing related or an uninitialized flag.

Reply to
MooseFET

8051s have a built in interrupt lock out and priority system. I doubt that he is getting into multiple levels of interrupts.
Reply to
MooseFET

Latency is 1 instruction cycle.

Reply to
TT_Man

No. The code runs perfectly in old date code devices and has been in production world wide for 15 odd years in one form or another.

Reply to
TT_Man

As I pointed out elsewhere, the memory locations in a given chip tend to go to one value on power up. On a different chip they will go to a different value. If you forgot to initialize something, this will make some devices work and others fail.

The timing related problem will only show if you have external inputs other than the clock and reset pins. The true false boundary varies from chip to chip and run to run.

Reply to
MooseFET

All inputs are flagged and re checked 25 ms later, If true , a flag change is set....

Reply to
TT_Man

It could be a narrow window of timing that is causing the problem. Try changing the clock speed just a a little and see if the problem goes away.

Reply to
MooseFET

Why should I? The problem lies in the manufacture of the chip, not my code. In any case, if it's missed by 1 nanosecond, it will catch it next time round, unless you can pull and release a trigger within 100 microseconds...

Reply to
TT_Man

I'm thinking that there really may be a problem in your code when you have something like contact bounce.

Reply to
MooseFET

Get real, contact bounce is handled in a 25mS background routine.........

Reply to
TT_Man

...after the oscillator starts.

--
Keith
Reply to
krw

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