I seek the help of the electronices gurus on this group, regarding planar inductors.
Does a planar inductor need a back plane ? Specifically, suppose that a planar inductor is fabricated on a double layer copper clad board(like that that used for 2 layer printed circuit boatd). Does the backplane have to exist right underneath the inductor traces on the other copper clad plane ? If yes, would the inductor traces behave like a transmission line ? I fully understand that there has to be a reference ground plane, but does it have to exist right underneath the traces ?
How does one compute the coupling capacitance for any two adjacent traces of a parallel spiral inductor, especially for the odd case, signals propagating in opposite directions in any adjacent pair of inductor traces ? I have searched for it, but received only vague answers.
Any hints/suggestions or pointers to relevant information will be greatly appreciated. Thanks in advance.
That depends on what you want the planar inductor to do, which in practice is frequency dependent.
Depends on what you want it to do .
A transmission line can be approximated as string of inductor/capacitor pairs.
The inductors are in series and each capacitor grounds a node in the string.
So a transmission line is an inductor, but with added extra capacitance to ground at regular intervals.
There are computer programs that calculate it all from first principles.
The commercial ones are expensive, because there aren't that many customers interested in using them. There's probably something free that will run on a Linux system, but it's unlikely to be easy to use.
Examples of the commercial "field solvers" get mentioned here from time to time.
I have not done planar inductors on PCBs but I have done them on chips.
You don't want a continuous ground plane under the inductor. That works like a shorted turn and greatly reduces the inductance and Q. If you can have just insulator under the inductor then that is best. (If you have resistive silicon under the inductor then there can be a benefit in putting a slotted metal shield under the inductor but that needs to be carefully optimised to do more good than harm.)
You can compute the coupling capacitance between traces with the open source program fastcap. You can compute the mutual inductances with fasthenry. If you do that on each segment of each turn then you can come up with a big netlist of capacitors and inductors and mutual inductances, that works well in SPICE. If you want to spend the price of a new car, there are commercial programs that can do all of that, but you don't really need them in most cases, provided the wavelength greatly exceeds the size of the inductor.
Not if you want inductance via the core. Shorted turns and all that (obviously..?).
Now, if you slot that plane so it isn't a shorted turn, well sir, you've just made yourself a nice tasty one-turn secondary! Works just fine for high current supplies, there's a lot of server PSUs made this way with modular outputs and planar secondaries (on flex).
There is some advantage to be had, using a single flat turn, versus a woven pattern, namely that, on one hand, you get a shielding effect from the big wide turn. That eliminates the nonuniformity of many-turns windings beneath. Downside: the inside of the bend is the shortest path, so is the preferred current path. Current is very uneven, so losses are higher.
You can approximate Litz cable in PCB format, by cutting a single wide winding into an array of parallel traces, and swapping the order of the traces halfway through so they all span equal lengths. The downside is, this increases leakage and radiation, as it must -- that's the point of Litz, to allow more magnetic field to permeate through the winding, giving more even current density.
What do you mean in opposite directions? If it's going up one, and down the other, in the same physical direction, you don't have an inductor, you have a transmission line pair -- which still has low-frequency-equivalent inductance, but it's not going to do anything with a core, the field is all between the traces, not external.
That's the trick with inductors, maximizing loop area. You want to minimize loop area everywhere else in a circuit, but glomp it together (into as tight a package as you can) when you do finally need it.
So say you start with a microstrip trace, that's so-and-so inductance per length. If you make a loop with the trace, it doesn't increase the inductance any, for the same total trace length. So you can remove ground underneath the trace, and, say, make it closer to coplanar waveguide (if the distance between opened ground, and trace, is much more than the laminate thickness, it doesn't much matter that they're not in the same plane; or, just imagine you've swapped the layer for sake of argument :) ). Which has higher characteristic impedance --> higher inductance. It's a start. What's more, if you put two traces nearby, they'll have much more coupling together. If those traces happen to be in series (i.e., different sides of a given turn, say?), they couple together. Inductance starts building up quadratically rather than linearly!
Or if you start with parallel strip transmission line (say, a trace on the top layer, and a trace on the bottom layer, in the same place), the same thing happens, i.e., only linear with TL length. But if you splay them apart, the impedance goes up. And if you start stacking multiple traces in series, going around the same way, again, inductance goes up quadratically, and you get a good inductor as such.
Thanks a lot for clarifying that there should be no ground plane right underneath a planar inductor. I have worked for years with microstrip technology, transmission lines, wave guides and even planar capacitor(interdigitated and overlay) and now my employers have started thinking seriously about planar inductors, specifically MMIC d esign with discrete components.
Thanks for the pointers to fastcap and fasthenry, but we have written our own analysis of planar capacitors and are planning to do the sa me for planar inductors. Our analysis code generates the SPICE netlist that can be used with any available SPICE simulator. We are planiing on similar lines for planar inductors, and plan to use the simple formalism of Greenh ouse. The confudion arose when we started to look at available literature(, and found that a nu mber of these authors(especially the VLSI guys) insist on a ground plane. T hat was when I put up my query.
You might want to try Fasthenry anyway. You need to account for skin effect and proximity-type effects which Fasthenry does, if you set the number of filaments high enough. I used to just increase the number of filaments until further increases didn't affect the answer much. You'll need a lot of RAM for some structures.
Back when I was doing it, there was a free but not open-source viewer from
that allowed me to check the input files for fastcap and fasthenry to make sure that I got the geometry right. It looks like they offer other stuff now - I haven't investigated.
e same for planar inductors. Our analysis code generates the SPICE netlist that can be used with any available SPICE simulator. We are planiing on sim ilar lines for planar inductors, and plan to use the simple formalism of Gr eenhouse. The confudion
a number of these authors(especially the VLSI guys) insist on a ground plan e. That was when I put up my query.
Both fastCap[ and fastHenry are available as source code to be downloaded, compiled and run on one's PC.
1 No. Magnetic flux can easily penetrate copper or silicon with no effect. MMIC integrated circuits can have one inductor or mutual inductances planned.
2 Signals in the inductor are currents of electrons. They go one way at a time. Each turn has a current the same direction. Mutual inductances are two signals self inductance is one signal.
Yes, above I did mention that fastcap and fasthenry are open source. I have had to edit the source and recompile fastcap to make it do exactly what I wanted, but you might not need to.
I mentioned that I used the (at the time closed-source) viewer (fastmodel) from fastfieldsolvers.com because it was useful in allowing the model to be viewed in 3d and rotated, zoomed etc. to find geometrical problems wth the model before simulating.
Not exactly true. A changing magnetic flux penetrating copper or conducting silicon will generate a voltage difference and a circulating current whose magnetic field will tend to cancel the initial magnetic flux. Think "shorted turn".
Unless there are positive and negative charge carriers involved.
Self inductance is measured on a single signal.
Mutual inductance documents the influence of one signal on a second signal.
Yes Bill, high frequencies are different than DC inductor currents. A MMIC micromechanical integrated circuit might use DC in an inductor for a mechanical cantilever. I will not provide a categorically thorough education in this chat room.
Bill says the eddy currents will "tend" to cancel the primary field. Yes, that tendency can be insignificant or important depending on the frequency range.
Hey Darku, what is your frequency range in the planar inductor? All?