Proposed Assembler Commands

To All,

Microprocessors have become so simple that it seems anyone can program them nowadays. But think of what it was like when the first processors came out and you had to program around noisy circuits and unreliable memory.

For example, here is a list of assembler commands that emulate the performance of the first computers. (They were found in old Deja View files.)

----------------------------------------------------------------------- Assembler Commands:

MNEMONIC INSTRUCTION

AAAH Add And Automatically Halt AAC Alter All Commands AAN Add Ad Nauseam AAR Alter At Random AARTZ Add And Reset To Zero AB Add Backwards ACM Automatically Clear Memory ADG Add Garbage AIB Attack Innocent Bystander ARRN Add and Reset to Random Number AWTT Assemble With Tinker Toys BAC Branch to Alpha Centauri BAF Blow All Fuses BAFL Branch And Flush BAH Branch And Hang BB Branch on Bug BBBF Branch on Bit Bucket Full BBC Branch Before Compare BBIL Branch on Blown Indicator Light BBL Branch on Burnt Out Light BBO Branch on Bathtub Overflow BBT Branch on Binary Tree BBW Branch Both Ways BCF Branch on chip box full BCH Branch on carry flag at half mast BCIL Branch Creating Infinite Loop BD Backspace Disk BDC Break Down and Cry BDT Burn Data Tree BEW Branch Either Way BF Belch Fire BFA Branch to False Assumption BH Branch and Hang BKCRDR Backspace Card Reader BKO Branch and Kill Operator BKSPD Backspace Disk BKTPIR Break Tape In Reverse BLI Branch if Loop Infinite BLMNF BLow Main Fuse BLPIN Branch and Loop Indefinite BMR Branch Multiple Registers BOB Branch On Bug BOBI Branch On Blinking Indicator BOBOI Branch On Blown Indicator BOCBF Branch On Chip-Box Full BOD Beat On Drum BOHP Bribe Operator for Higher Priority BOI Byte Operator Immediately BOPLT Burn Out Pilot Lights BOPO Branch On Power Off BOSO Branch On Sleepy Operator BOXMS Branch On Index Missing BPB Branch on Program Bug BPDI Be Polite, Don't Interrupt BPE Bypass Program Error BPECK Bypass Error Check BPM Branch on the Phase of the Moon BPO Branch on Power Off BRPCB Burp and Clear Bytes BRSS Branch on Sunspot BS Branch Sometimes BSC Branch on Short Circuit BSCH Break Selected Channel BSO Branch on sleepy operator BST Backspace and Stretch Tape BTI Blow Trumpet Immediately BW Branch on Whim BYCRE Bypass Core CBS Crash Bothersome Source-code CDC Close Disk Cover CDHI Crash Disk Head Immediate CDIOOAZ Calm Down, It's Only Ones And Zeroes CEMU Close Eyes and Monkey With User Space CH Creat Havoc CIRM Circulate Memory CLBR Clobber Register CLBRI Clobber Register Immediately CM Circulate Memory CMBG Create Machine Bug CMD Compare Meaningless Data CML Compute Meaning of Life CNB Cause Nervous Breakdown CNFM Confuse Memory CNFOP Confuse Operator COLB Crash for Operator's Lunch Break CPAR Crumple Paper and Rip CPB Create Program Bug CRASH Continue Running After Stop or Halt CRB Crash and Burn CRDT CReate Data CRE Create Random Error CRN Convert to Roman Numerals CS Crash System CSL Curse and Swear Loudly CTRNS Convert To Roman Numerals CU Convert to Unary CUN Cancel all User Numbers CVG Convert to Garbage CVUME Cover Up Machine Errors CWOM Complement Write-Only Memory CZZC Convert Zone to Zip Code DAC Divide and Crash DADL Disable Address and Data Lines DAMIT Transfer Control to Perdition DAO Divide and Overflow DAX Divide and Explode DBTP Drop Back Ten and Punt DBZ Divide By Zero DC Divide and Conquer DCTCB Dump Core To Chad Box DD Destroy disk DDC Dally During Calculations DMWH Dump Map of Western Hemisphere DESSPK Destroy Storage Protect Key DEVIA Develop Ineffective Address DITCK Drop Into Check DLN Don't Look Now... DLTCR Delete Core DMNS Do What I Mean, Not What I Say DMPE Decide to Major in Phys Ed. DMPK Destroy Memory Protect Key DMV Double Mains Voltage DNPG Do Not Pass Go DO Divide and Overflow DOC Drive Operator Crazy DPGM Destroy Program DPK Destroy Storage Protect Key DPMI Declare Programmer Mentally Incompetent DRPBTS Drop Bits DSTME Destroy Memory DTC Destroy This Command DTE Decrement Telephone Extension DTVFL Destroy Third Variable From Left DW Destroy World DZSR Divide by Zero and Store Remainder EBB Edit and Blank Buffer ECO Electrocute Computer Operator ECP Erase card punch ED Eject disk EDB Execute Disable Bit EDPMAB Electrocute DP Manager And Branch EFD Emulate Frisbee Using Disk Pack EIAO Execute In Any Order EIOC Execute Invalid Opcode EIS Encrypt Instruction Set EJCAB Eject Chad Box EJD Eject Disk EMCP Eject Math Co-processor EMPC Emulate Pocket Calculator EMSE Edit and Mark Something Else EMW Emulate Maytag Washer EN Emulate Nintendo ENF Emit Noxious Fumes EP Execute Programmer EPE Execute Program Error EPI Execute Programmer Immediately EPMAS Erase Protected Memory Areas ERCDP Erase Card Punch ERCDS Erase Cards ERD Eject Removable Disk EROS Erase Read-Only Storage ERPTW Erase Print Wheel ERROS Erase Read Only Storage ETCRD Eat Card EXIOC Execute Invalid Op Code EXOP Execute Operator EXOPI Execute Operator Immediately FDCDJ Feed Card and Jam FLI Flash Lights Impressively FSG Fill Screen with Garbage FSM Fold, Spindle and Mutilate GCAR Get Correct Answer Regardless GDP Grin Defiantly at Programmer GFD Go Forth and Divide GFM Go Forth and Multiply GLPSB Gulp and Store Bytes GPAER Generate Parity Error HCF Halt and catch fire HCP Hide Central Processor HSO Halt and Sterilize Operator IAD Illogical AND IAE Ignore All Exceptions IAI Inquire And Ignore IBP Insert Bug and Proceed IFKTR Initiate Fake-out Routine IGSPC Ignore Supervisor Call II Interrupt and ignore IIB Ignore Inquiry and Branch IISH Ignore Interrupt And Hang IL Infinite loop ILLAD Illogical AND ILLOR Illogical OR ILPS Invert Logical Power Supply INVRB Invert Record and Branch IOR Illogical OR IPS Ignite Power Supply IRB Invert record and branch IRT Ignore write-protect tab ISC Insert Sarcastic Comments ISR Illogical Shift to the Right ITLKC Interlock Core JDO Jump and Destroy Operator JMKYP Jam Keypunches JTC Jump To Conclusions JTZ Jump to Twilight Zone KCE Kill Consultant on Error LAP Laugh At Programmer LCC Load and Clear Core LED Load and Erase Data LGOWY Load and Go Away LHOS Load Hostile Operating System LIA Load Ineffective Address LMB Lose Message and Branch LPA Lead Programmer Astray LPCON Loop Continuous LRI Lose Register Immediate MAZ Multiply Answer by Zero MBF Multiply and be Fruitful MDB Multiply and Drop Bits MDRBT Move and Drop Bits MLR Move and Lose Record MST Mount Scotch Tape MTI Make Tape Invalid MVAR Move to Random Address MVCON Move Continuous MVLR Move and Lose Record MVWRC Move and Wrap Core MW Malfunction Whenever MWAG Make Wild-Assed Guess MWC Move and warp core MWT Malfunction Without Telling NPN No program necessary OCS Overwrite code segment OHS Order Ham Sandwich OOHH Only On Half-hours OOS Override operating system P$*! Punch Obsenity PBC Print and Break Chain PBS Pop Before Stacking PCHD Punch Disk PCHOP Punch Operator PD Play Dead PDKBN Punch Disk Binary PDM Play Drum Memory PDSK Punch Disk PEHC Punch Extra Holes in Cards PFD Punt on Fourth Down PINV Punch Invalid PLSC Perform Light Show on Console PM Punch Memory PNRP Print Nasty Replies to Programmer PO Punch operator POCL Punch Out Console Lights POF Print On Fly POPI Punch Operator Immediately PPS Push or Pop Stack PPSW Pack Program Status Word PRANB Pick up Random Bits PRSMR Print and Smear PS!@* Print Obscenity PSD Pause and smoke dope PSI Print and Smear Ink PVLC Punch Variable Length Card RA Randomize Answer RASC Read and Shred Card RBAFG Read Binary And Forget RBT Rewind and Break Tape RCB Read Command Backwards RCDRD Rewind Card Reader RCDSCD Read Card and Scramble Data RCR Rewind card reader RCS Read card and scramble data RCSD Read Card and Scramble Deck RCTKG Read Count Key and Garbage RD Reverse Direction RDA Refuse to Disclose Answer RDB Run Disk Backwards RDBR Read Bad Record RDCBX Read Chad Box RDCHS Read Chaos RDI Reverse Disk Immediate RDIRG Read Inter Record Gap RDS Read Sideways REDTH Reduce Throughput REIMT Reinitialize Meter REPAB Reverse Parity And Branch REWFR Rewind Forward RID Read Invalid Data RIM Read Instruction Manual RIODNR Rotate Input/Output Device Numbers Randomly RLI Rotate Left Indefinitely RNR Read Noise Record ROC Randomize Op Codes ROLPR Rewind On-Line Printer ROM Read operator's mind ROO Rub Out Operator RPBL Read Print and Blush RPI Reverse Priority of Interrupts RPLT Read from Plotter RPM Read Programmer's Mind RPTR Read from Printer RRCR Rotate Right Cash Register RRR Read Record and Run Away RRR Rotate Right Randomly RRT Record and Rip Tape RSC Read and Shred Card RSC Rewind System Clock RSD Read and Scramble Data RSD Read and Self Destruct RSO Resume on stack overflow RSTOM Read From Store-only Memory RT Reduce throughput RTS Return To Sender RVDOD Reverse Drum Or Disk RVDRI Reverse Drum Immediate RWBKT Rewind and Break Tape RWCR Rewind Card Reader RWDSK Rewind Disk RWM Rewind Memory RWRT Read While Ripping Tape RWTOD Rewind Tape Onto Disk RWWRT Read and Write While Ripping Tape SAI Skip All Instructions SARTZ Subtract And Reset To Zero SAS Sit And Spin SC Scramble channels SCCA Short Circuit on Correct Answer SCCHS Scramble Channels SCDTA Scatter Data SCMRY Scatter Memory SCPR Scatter Print Record SCPSW Scatter Program Status Word SD Scatter Deck SDRB Search and Destroy Register Byte SFH Set Flags to Half-mast SFRA Skip Forms and Run Away SFT Stall For Time SHAB Shift a Bit SHLBM Shift a Little Bit More SHLPN Sharpen Light Pencil SKRSD Seek Record and Scratch Disk SLC Shift Left Continuous SLD Slip Disk SLP Sharpen Light Pen SMR Skip on Meaningless Result SNC Skip Next Command SOS Sign off, Stupid SOSAJ Select Output Stacker And Jam SOT Sit on a Tack SPOFF Switch processor off SPON Switch processor on SPRDK Shuffle Program Deck SPS Set Panel Switches SPSW Scramble Program Status Word SPT Scramble Protected Tapes SQPC Sit Quietly and Play With Your Crayons SQSW Scramble Program Status Word SRCC Select Reader and Chew Cards SRDR Shift Right Double Ridiculous SRSD Seek Record and Scratch Disk SRZ Subtract and Reset to Zero SSD Seek and Scratch Disk SSJ Select Stacker and Jam SST Stop and Stretch Tape STA Store Anywhere STB Stretch Tape Binary STROM Store in Read-only Memory STUP Stacker Upset TAB Throw away byte TADBT Transfer And Drop Bits TAM Transfer Accumulator to Minneapolis TARC Take Arithmetic Review Course TCLSR Transfer Control and Lose Return TCTDK Transfer Control To Disk TCTOL Transfer Control To Overhead Lights TCTPL Transfer Control To Pilot Lights TCTWS Transfer Control To Wall Socket TDB Transfer and Drop Bits TLO Turn Indicator Lights Off TMTDK Transfer Monitor To Disk TN Take a Nap TPDEC Triple Pack Decimal TPDH Tell Programmer to Do it Him/Herself TPF Turn Power Off TPN Turn Power On TPO Turn power off TPR Tear Paper TRAHG Transfer And Hang TRDB Transfer And Drop Bits TRSCH Trap Secretary and Halt TSE Test and Swap if Equal TSTT Test a Bit for Two TTA Try, Try Again TVT Test vacuum tubes UCB Uncouple CPU and Branch UCCS Use Chinese Character Set UER Update and Erase Record UINDA Use Inverse Digital Array ULDA Unload Accumulator UMH Use Mains Voltage as Logic High UP Understand Program UPC Uncouple Program Counter UPCI Update Card In Place UPERR Update and Erase Record WB Wait for Bus WBT Water Binary Tree WCTKG Write Count Key and Garbage WED Write and Erase Data WEMG Write Eighteen Minute Gap WF Wait Forever WHFO Wait Until Hell Freezes Over WI Write Illegibly WID Write Invalid Data WMTAE Write Memory, Transfer, And Erase WNR Write Noise Record WPM Write Programmer's Mind WRC Write on Read-Cycle WRS Write to ROM storage WSWW Work in Strange and Wonderous Ways WWLR Write Wrong-Length Record XIO Execute Invalid Opcode XIP Execute Invalid Program XMAS Execute Main Areas of Storage XNH Execute No-op and Hang XPR Execute Programmer XSP Execute Systems Programmer XUI Execute Undefined Instruction ZAR Zero Any Register

-----------------------------------------------------------------------

Best Wishes,

Mike Monett

Reply to
Mike Monett
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Most of these are ancient S/360 instructions. But BCF is the opcode for Branch and Catch Fire.

John

Reply to
John Larkin
[...]

Yes, but there's not many people left who have seen a 360 or know what it is:)

Thanks - your version of BCF is much better. I have duly updated my original.

Mike Monett

Reply to
Mike Monett

I understand that you can program a Xilinx FPGA to fry itself, if there's enough power supply available. Some of the Spartan 2 startup power requirements practically guaranteed that enough power *would* be available.

Somebody once designed a chip coating material, for high-security applications, that allowed a chip to literally explode itself.

John

Reply to
John Larkin

[... big long CISC snipped ..]

These days RISC is the way to go.

INSTRUCTION MEANING

----------------------------------------------------------- CBJS Compliment bit and jump if set

Thats all you need.

--
--
kensmith@rahul.net   forging knowledge
Reply to
Ken Smith

It probably didn't work. The 6800 was an n-channel depletion-load chip. You need CMOS to start a decent blaze.

I think it did have an opcode that would put it into a test mode that only a reset would fix.

John

Reply to
John Larkin

The 6800 was a 5-volt-only chip, all n-channel, dynamic logic I think; the p-ch chips had a weird negative supply, -12 or something.

The only nasty part about the 6800 was that you had to externally generate a 2-phase clock that had some (for the time) nasty swing, edge rate, and non-overlap limits. The 6801/2/3 and later stuff was a lot easier to clock.

I once wrote an RTOS for the 6800, which was tricky because the stack operations were primitive. We included a reentrant floating-point package and token ring LAN (invented independently!) and it worked pretty well in process control apps.

I always liked the Moto instruction sets. The Intel stuff has always seemed klugey and disorganized to me. So, we all wound up with the worst instruction set and the worst OS the industry could invent.

John

Reply to
John Larkin

I once worked at a company where old projects had used a processor (don't remember which one) where one of the illegal opcodes would actually cause the processor to go into a lockup mode where it would overheat and char the PCB. The engineers referred to the illegal opcode as the "Catch Fire and Die" instruction.

--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . .  VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada  . . . . . . . . . . . http://www.marmot-eng.com
Reply to
Tim Hubberstey

Wasn't the 8008 a p-ch part? The early eproms (1702? types) certainly were. The 2708 needed a negative supply, but I can't recall if it was p-ch or just needed substrate bias.

John

Reply to
John Larkin

Oh, really? Have you looked at your bank? Ok, so IBM changed the name from s/360 to zSeries, but it's still making quite a good chunk-o-change.

It was originally "Backspace and Catch Fire".

BTW, the 'I' in "EPI" is "immediate", to be consistent with the rest of the ISA.

--
  Keith
Reply to
keith

Sure. Think of an FPGA as a kabillion copies of a kabillion drivers driving one wire. Drive a random mix of drivers into the routing array and the power supply will melt. This is *exactly* why Xilinx doesn't release their routing/configuration information. Their tools check for ptoper outputs, so won't let you do something dumb (at least not *this* dumb).

Coating? Ecplode? I doubt it. I'm told the government uses thermite, but it's hardly a "coating" and will hardly "explode". Having worked in physical security on encryption hardware (commercial stuff only - no security clearance here), I've heard much of what the spooks and nukes use.

--
  Keith
Reply to
keith

Hmm, I thought Moto and Intel were all p-channel at that time.

The original IBM PC monochrome adapter allowed software to halt the horixontal sweep, causing the monitor to let its magic smoke out. Oops.

--
  Keith
Reply to
keith

Rumour has it that the 6800 had an undocumented instruction.

HCF - Halt and Catch Fire

Graham

ok - you got that one already

Reply to
Pooh Bear

From a Motorola package with a date code 1975 ceramic M6800 shrink-wrapped to it:

"Both the MPU and the other Motorola system parts are TTL compatible, MOS N-channel, silicon gate devices."

Dynamic, too. 8-(

IIRC, the TI TMS1000 from a few years earlier was p-channel metal gate.

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

The s/360 dates from 1964, and I doubt any of the original systems are still running. You couldn't even afford the electricity they need nowadays:)

The basic s/360 design evolved through many different systems. Here's a nice review along with pictures of the original hardware. Note the DRAM prices:)

----------------------------------------------------------------------- The original 360 family was announced in 1964, and the lower midrange model 40 was the first to ship a year later. The most interesting version was model 67 (first shipped June 1966) which had hardware to support virtual memory. IBM had planned a special operating system for it (TSS/360), which they never managed to get to work well enough to be usable. Within IBM, model 67 was used with a system known as CP-67, which allowed a single 360/67 to simulate multiple machines of various models. This turned out to be very useful for developing operating systems.

In the summer of 1970, IBM announced a family of machines with an enhanced instruction set, called System/370. These machines were all designed with virtual hardware similar to 360/67, and eventually all the operating systems were enhanced to take advantage of it in some way.

[...]

Big, fast disk drives were one of the strengths of IBM. In 1973, the big mainframe disk drive was model 3330-11: 400 MB for $111,600 or $279/MB.

By 1980, you could get the 3380: 2.5GB for $87,500 or $35/MB. DRAM prices were dropping, too: In 1979 the price was cut from $75,000/MB to $50,000/MB.

Through the 1970's and 1980's, the machines got bigger and faster, and multi-processor systems became common, but the basic architecture did not change. Around 1982, addresses were extended from 24 bits to 31 bits (370-XA), and in 1988 extensions were put in to support multiple address spaces (370-ESA).

In 1990, the ES/9000 models came out with fiber-optical I/O channels (ESCON), and IBM began using the name System/390.

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------------------------------------------------------------------------- Mike Monett

Reply to
Mike Monett

--------------- SNIPped for brevity --------------

I remember that the 6800 had an un-documented op-code that was called HCF = Halt and Catch Fire by those that discovered it.

Reply to
Robert Baer

True.

Reply to
Robert Baer

Doesn't the PowerPC have an EIEIO op-code (Enforce Inorder Execution of I/O)?

Reply to
Ralph Barone

It's not an instruction, but I was surprised at the exclusion of the Failed UniBus Address Register in this list...

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Matt Roberds

Reply to
mroberds

I sometimes suspected IBM wanted to help ensure their PC would never compete with real computers.

The 1802 did RISC before its heyday. I suspect it was motivated by transistor count rather than speed. At the time, CMOS had the lowest gate density.

--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Reply to
Larry Brasfield

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